blob: 570ef8847d67a162e6ee1bbc0052856125f79f81 [file] [log] [blame]
Achin Gupta4f6ad662013-10-25 09:08:21 +01001/*
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +00002 * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
Achin Gupta4f6ad662013-10-25 09:08:21 +01003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * Redistributions of source code must retain the above copyright notice, this
8 * list of conditions and the following disclaimer.
9 *
10 * Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
13 *
14 * Neither the name of ARM nor the names of its contributors may be used
15 * to endorse or promote products derived from this software without specific
16 * prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 * POSSIBILITY OF SUCH DAMAGE.
29 */
Dan Handleyea596682015-04-01 17:34:24 +010030#ifndef __CPU_MACROS_S__
31#define __CPU_MACROS_S__
Achin Gupta4f6ad662013-10-25 09:08:21 +010032
33#include <arch.h>
34
Soby Mathewc704cbc2014-08-14 11:33:56 +010035#define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
36 (MIDR_PN_MASK << MIDR_PN_SHIFT)
Achin Gupta4f6ad662013-10-25 09:08:21 +010037
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +000038/* The number of CPU operations allowed */
39#define CPU_MAX_PWR_DWN_OPS 2
40
41/* Special constant to specify that CPU has no reset function */
42#define CPU_NO_RESET_FUNC 0
43
44/* Word size for 64-bit CPUs */
45#define CPU_WORD_SIZE 8
46
Soby Mathewc704cbc2014-08-14 11:33:56 +010047 /*
48 * Define the offsets to the fields in cpu_ops structure.
49 */
50 .struct 0
51CPU_MIDR: /* cpu_ops midr */
52 .space 8
53/* Reset fn is needed in BL at reset vector */
Yatharth Kochar36433d12014-11-20 18:09:41 +000054#if IMAGE_BL1 || IMAGE_BL31
Soby Mathewc704cbc2014-08-14 11:33:56 +010055CPU_RESET_FUNC: /* cpu_ops reset_func */
56 .space 8
57#endif
Juan Castillo7d199412015-12-14 09:35:25 +000058#if IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +000059CPU_PWR_DWN_OPS: /* cpu_ops power down functions */
60 .space (8 * CPU_MAX_PWR_DWN_OPS)
Soby Mathew8e2f2872014-08-14 12:49:05 +010061#endif
Soby Mathew38b4bc92014-08-14 13:36:41 +010062#if (IMAGE_BL31 && CRASH_REPORTING)
63CPU_REG_DUMP: /* cpu specific register dump for crash reporting */
64 .space 8
65#endif
Soby Mathewc704cbc2014-08-14 11:33:56 +010066CPU_OPS_SIZE = .
Achin Gupta4f6ad662013-10-25 09:08:21 +010067
Soby Mathewc704cbc2014-08-14 11:33:56 +010068 /*
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +000069 * Write given expressions as quad words
70 *
71 * _count:
72 * Write at least _count quad words. If the given number of
73 * expressions is less than _count, repeat the last expression to
74 * fill _count quad words in total
75 * _rest:
76 * Optional list of expressions. _this is for parameter extraction
77 * only, and has no significance to the caller
78 *
79 * Invoked as:
80 * fill_constants 2, foo, bar, blah, ...
Achin Gupta4f6ad662013-10-25 09:08:21 +010081 */
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +000082 .macro fill_constants _count:req, _this, _rest:vararg
83 .ifgt \_count
84 /* Write the current expression */
85 .ifb \_this
86 .error "Nothing to fill"
87 .endif
88 .quad \_this
89
90 /* Invoke recursively for remaining expressions */
91 .ifnb \_rest
92 fill_constants \_count-1, \_rest
93 .else
94 fill_constants \_count-1, \_this
95 .endif
96 .endif
97 .endm
98
99 /*
100 * Declare CPU operations
101 *
102 * _name:
103 * Name of the CPU for which operations are being specified
104 * _midr:
105 * Numeric value expected to read from CPU's MIDR
106 * _resetfunc:
107 * Reset function for the CPU. If there's no CPU reset function,
108 * specify CPU_NO_RESET_FUNC
109 * _power_down_ops:
110 * Comma-separated list of functions to perform power-down
111 * operatios on the CPU. At least one, and up to
112 * CPU_MAX_PWR_DWN_OPS number of functions may be specified.
113 * Starting at power level 0, these functions shall handle power
114 * down at subsequent power levels. If there aren't exactly
115 * CPU_MAX_PWR_DWN_OPS functions, the last specified one will be
116 * used to handle power down at subsequent levels
117 */
118 .macro declare_cpu_ops _name:req, _midr:req, _resetfunc:req, \
119 _power_down_ops:vararg
120 .section cpu_ops, "a"
121 .align 3
Soby Mathewc704cbc2014-08-14 11:33:56 +0100122 .type cpu_ops_\_name, %object
123 .quad \_midr
Yatharth Kochar36433d12014-11-20 18:09:41 +0000124#if IMAGE_BL1 || IMAGE_BL31
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +0000125 .quad \_resetfunc
Soby Mathewc704cbc2014-08-14 11:33:56 +0100126#endif
Soby Mathew8e2f2872014-08-14 12:49:05 +0100127#if IMAGE_BL31
Jeenu Viswambharanee5eb802016-11-18 12:58:28 +00001281:
129 /* Insert list of functions */
130 fill_constants CPU_MAX_PWR_DWN_OPS, \_power_down_ops
1312:
132 /*
133 * Error if no or more than CPU_MAX_PWR_DWN_OPS were specified in the
134 * list
135 */
136 .ifeq 2b - 1b
137 .error "At least one power down function must be specified"
138 .else
139 .iflt 2b - 1b - (CPU_MAX_PWR_DWN_OPS * CPU_WORD_SIZE)
140 .error "More than CPU_MAX_PWR_DWN_OPS functions specified"
141 .endif
142 .endif
Soby Mathew8e2f2872014-08-14 12:49:05 +0100143#endif
Soby Mathew38b4bc92014-08-14 13:36:41 +0100144#if (IMAGE_BL31 && CRASH_REPORTING)
145 .quad \_name\()_cpu_reg_dump
146#endif
Soby Mathewc704cbc2014-08-14 11:33:56 +0100147 .endm
Dan Handleyea596682015-04-01 17:34:24 +0100148
149#endif /* __CPU_MACROS_S__ */