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git01.mediatek.com / filogic / atf / 045bbacda04ce798ffefaed1861cf19adce95adb / . / include / lib / cpus / aarch64 / neoverse_e1.h
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Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]1/*
Antonio Nino Diaz5e79cfe2019-02-11 13:34:15 +0000[diff] [blame]2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6
John Tsichritzis16e6d9f2019-02-19 14:01:55 +0000[diff] [blame]7#ifndef NEOVERSE_E1_H
8#define NEOVERSE_E1_H
Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]9
Antonio Nino Diaz5e79cfe2019-02-11 13:34:15 +0000[diff] [blame]10#include <lib/utils_def.h>
11
John Tsichritzisa5447ec2019-03-15 15:40:27 +0000[diff] [blame]12#define NEOVERSE_E1_MIDR U(0x410FD4A0)
Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]13
14/*******************************************************************************
15 * CPU Extended Control register specific definitions.
16 ******************************************************************************/
John Tsichritzis16e6d9f2019-02-19 14:01:55 +0000[diff] [blame]17#define NEOVERSE_E1_ECTLR_EL1 S3_0_C15_C1_4
Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]18
19/*******************************************************************************
20 * CPU Auxiliary Control register specific definitions.
21 ******************************************************************************/
John Tsichritzis16e6d9f2019-02-19 14:01:55 +0000[diff] [blame]22#define NEOVERSE_E1_CPUACTLR_EL1 S3_0_C15_C1_0
Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]23
24/*******************************************************************************
25 * CPU Power Control register specific definitions.
26 ******************************************************************************/
27
John Tsichritzis16e6d9f2019-02-19 14:01:55 +0000[diff] [blame]28#define NEOVERSE_E1_CPUPWRCTLR_EL1 S3_0_C15_C2_7
29#define NEOVERSE_E1_CPUPWRCTLR_EL1_CORE_PWRDN_BIT (U(1) << 0)
Joel Huttona7c46872018-01-10 16:06:07 +0000[diff] [blame]30
John Tsichritzis16e6d9f2019-02-19 14:01:55 +0000[diff] [blame]31#endif /* NEOVERSE_E1_H */