blob: cd6e11c0330f3ac4ee4ec86dab144279e30df47a [file] [log] [blame]
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001/*
2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3 *
dp-armfa3cf0b2017-05-03 09:38:09 +01004 * SPDX-License-Identifier: BSD-3-Clause
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00005 */
6
7#include <arch.h>
8#include <arch_helpers.h>
9#include <assert.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000010#include <common_def.h>
11#include <debug.h>
12#include <errno.h>
13#include <platform_def.h>
14#include <string.h>
15#include <types.h>
16#include <utils.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010017#include <xlat_tables_arch.h>
18#include <xlat_tables_defs.h>
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000019#include <xlat_tables_v2.h>
Sandrine Bailleux090c8492017-05-19 09:59:37 +010020
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +000021#include "xlat_tables_private.h"
22
Sandrine Bailleux66342932017-07-18 13:26:36 +010023/*
24 * Each platform can define the size of its physical and virtual address spaces.
25 * If the platform hasn't defined one or both of them, default to
26 * ADDR_SPACE_SIZE. The latter is deprecated, though.
27 */
28#if ERROR_DEPRECATED
29# ifdef ADDR_SPACE_SIZE
30# error "ADDR_SPACE_SIZE is deprecated. Use PLAT_xxx_ADDR_SPACE_SIZE instead."
31# endif
32#elif defined(ADDR_SPACE_SIZE)
33# ifndef PLAT_PHY_ADDR_SPACE_SIZE
34# define PLAT_PHY_ADDR_SPACE_SIZE ADDR_SPACE_SIZE
35# endif
36# ifndef PLAT_VIRT_ADDR_SPACE_SIZE
37# define PLAT_VIRT_ADDR_SPACE_SIZE ADDR_SPACE_SIZE
38# endif
39#endif
40
41/*
42 * Allocate and initialise the default translation context for the BL image
43 * currently executing.
44 */
45REGISTER_XLAT_CONTEXT(tf, MAX_MMAP_REGIONS, MAX_XLAT_TABLES,
46 PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE);
47
Antonio Nino Diazac998032017-02-27 17:23:54 +000048#if PLAT_XLAT_TABLES_DYNAMIC
49
50/*
51 * The following functions assume that they will be called using subtables only.
52 * The base table can't be unmapped, so it is not needed to do any special
53 * handling for it.
54 */
55
56/*
57 * Returns the index of the array corresponding to the specified translation
58 * table.
59 */
60static int xlat_table_get_index(xlat_ctx_t *ctx, const uint64_t *table)
61{
Varun Wadekar66231d12017-06-07 09:57:42 -070062 for (unsigned int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000063 if (ctx->tables[i] == table)
64 return i;
65
66 /*
67 * Maybe we were asked to get the index of the base level table, which
68 * should never happen.
69 */
70 assert(0);
71
72 return -1;
73}
74
75/* Returns a pointer to an empty translation table. */
76static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
77{
Varun Wadekar66231d12017-06-07 09:57:42 -070078 for (unsigned int i = 0; i < ctx->tables_num; i++)
Antonio Nino Diazac998032017-02-27 17:23:54 +000079 if (ctx->tables_mapped_regions[i] == 0)
80 return ctx->tables[i];
81
82 return NULL;
83}
84
85/* Increments region count for a given table. */
86static void xlat_table_inc_regions_count(xlat_ctx_t *ctx, const uint64_t *table)
87{
88 ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)]++;
89}
90
91/* Decrements region count for a given table. */
92static void xlat_table_dec_regions_count(xlat_ctx_t *ctx, const uint64_t *table)
93{
94 ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)]--;
95}
96
97/* Returns 0 if the speficied table isn't empty, otherwise 1. */
98static int xlat_table_is_empty(xlat_ctx_t *ctx, const uint64_t *table)
99{
100 return !ctx->tables_mapped_regions[xlat_table_get_index(ctx, table)];
101}
102
103#else /* PLAT_XLAT_TABLES_DYNAMIC */
104
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000105/* Returns a pointer to the first empty translation table. */
106static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
107{
108 assert(ctx->next_table < ctx->tables_num);
109
110 return ctx->tables[ctx->next_table++];
111}
112
Antonio Nino Diazac998032017-02-27 17:23:54 +0000113#endif /* PLAT_XLAT_TABLES_DYNAMIC */
114
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000115/* Returns a block/page table descriptor for the given level and attributes. */
Sandrine Bailleux04980a32017-04-19 14:02:23 +0100116static uint64_t xlat_desc(mmap_attr_t attr, unsigned long long addr_pa,
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100117 int level, uint64_t execute_never_mask)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000118{
119 uint64_t desc;
120 int mem_type;
121
122 /* Make sure that the granularity is fine enough to map this address. */
123 assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0);
124
125 desc = addr_pa;
126 /*
127 * There are different translation table descriptors for level 3 and the
128 * rest.
129 */
130 desc |= (level == XLAT_TABLE_LEVEL_MAX) ? PAGE_DESC : BLOCK_DESC;
131 /*
132 * Always set the access flag, as TF doesn't manage access flag faults.
133 * Deduce other fields of the descriptor based on the MT_NS and MT_RW
134 * memory region attributes.
135 */
136 desc |= (attr & MT_NS) ? LOWER_ATTRS(NS) : 0;
137 desc |= (attr & MT_RW) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO);
138 desc |= LOWER_ATTRS(ACCESS_FLAG);
139
140 /*
141 * Deduce shareability domain and executability of the memory region
142 * from the memory type of the attributes (MT_TYPE).
143 *
144 * Data accesses to device memory and non-cacheable normal memory are
145 * coherent for all observers in the system, and correspondingly are
146 * always treated as being Outer Shareable. Therefore, for these 2 types
147 * of memory, it is not strictly needed to set the shareability field
148 * in the translation tables.
149 */
150 mem_type = MT_TYPE(attr);
151 if (mem_type == MT_DEVICE) {
152 desc |= LOWER_ATTRS(ATTR_DEVICE_INDEX | OSH);
153 /*
154 * Always map device memory as execute-never.
155 * This is to avoid the possibility of a speculative instruction
156 * fetch, which could be an issue if this memory region
157 * corresponds to a read-sensitive peripheral.
158 */
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100159 desc |= execute_never_mask;
160
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000161 } else { /* Normal memory */
162 /*
163 * Always map read-write normal memory as execute-never.
164 * (Trusted Firmware doesn't self-modify its code, therefore
165 * R/W memory is reserved for data storage, which must not be
166 * executable.)
167 * Note that setting the XN bit here is for consistency only.
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100168 * The function that enables the MMU sets the SCTLR_ELx.WXN bit,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000169 * which makes any writable memory region to be treated as
170 * execute-never, regardless of the value of the XN bit in the
171 * translation table.
172 *
173 * For read-only memory, rely on the MT_EXECUTE/MT_EXECUTE_NEVER
174 * attribute to figure out the value of the XN bit.
175 */
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100176 if ((attr & MT_RW) || (attr & MT_EXECUTE_NEVER)) {
177 desc |= execute_never_mask;
178 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000179
180 if (mem_type == MT_MEMORY) {
181 desc |= LOWER_ATTRS(ATTR_IWBWA_OWBWA_NTR_INDEX | ISH);
182 } else {
183 assert(mem_type == MT_NON_CACHEABLE);
184 desc |= LOWER_ATTRS(ATTR_NON_CACHEABLE_INDEX | OSH);
185 }
186 }
187
188 return desc;
189}
190
191/*
192 * Enumeration of actions that can be made when mapping table entries depending
193 * on the previous value in that entry and information about the region being
194 * mapped.
195 */
196typedef enum {
197
198 /* Do nothing */
199 ACTION_NONE,
200
201 /* Write a block (or page, if in level 3) entry. */
202 ACTION_WRITE_BLOCK_ENTRY,
203
204 /*
205 * Create a new table and write a table entry pointing to it. Recurse
206 * into it for further processing.
207 */
208 ACTION_CREATE_NEW_TABLE,
209
210 /*
211 * There is a table descriptor in this entry, read it and recurse into
212 * that table for further processing.
213 */
214 ACTION_RECURSE_INTO_TABLE,
215
216} action_t;
217
Antonio Nino Diazac998032017-02-27 17:23:54 +0000218#if PLAT_XLAT_TABLES_DYNAMIC
219
220/*
221 * Recursive function that writes to the translation tables and unmaps the
222 * specified region.
223 */
224static void xlat_tables_unmap_region(xlat_ctx_t *ctx, mmap_region_t *mm,
225 const uintptr_t table_base_va,
226 uint64_t *const table_base,
227 const int table_entries,
Varun Wadekar66231d12017-06-07 09:57:42 -0700228 const unsigned int level)
Antonio Nino Diazac998032017-02-27 17:23:54 +0000229{
230 assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
231
232 uint64_t *subtable;
233 uint64_t desc;
234
235 uintptr_t table_idx_va;
236 uintptr_t table_idx_end_va; /* End VA of this entry */
237
238 uintptr_t region_end_va = mm->base_va + mm->size - 1;
239
240 int table_idx;
241
242 if (mm->base_va > table_base_va) {
243 /* Find the first index of the table affected by the region. */
244 table_idx_va = mm->base_va & ~XLAT_BLOCK_MASK(level);
245
246 table_idx = (table_idx_va - table_base_va) >>
247 XLAT_ADDR_SHIFT(level);
248
249 assert(table_idx < table_entries);
250 } else {
251 /* Start from the beginning of the table. */
252 table_idx_va = table_base_va;
253 table_idx = 0;
254 }
255
256 while (table_idx < table_entries) {
257
258 table_idx_end_va = table_idx_va + XLAT_BLOCK_SIZE(level) - 1;
259
260 desc = table_base[table_idx];
261 uint64_t desc_type = desc & DESC_MASK;
262
263 action_t action = ACTION_NONE;
264
265 if ((mm->base_va <= table_idx_va) &&
266 (region_end_va >= table_idx_end_va)) {
267
268 /* Region covers all block */
269
270 if (level == 3) {
271 /*
272 * Last level, only page descriptors allowed,
273 * erase it.
274 */
275 assert(desc_type == PAGE_DESC);
276
277 action = ACTION_WRITE_BLOCK_ENTRY;
278 } else {
279 /*
280 * Other levels can have table descriptors. If
281 * so, recurse into it and erase descriptors
282 * inside it as needed. If there is a block
283 * descriptor, just erase it. If an invalid
284 * descriptor is found, this table isn't
285 * actually mapped, which shouldn't happen.
286 */
287 if (desc_type == TABLE_DESC) {
288 action = ACTION_RECURSE_INTO_TABLE;
289 } else {
290 assert(desc_type == BLOCK_DESC);
291 action = ACTION_WRITE_BLOCK_ENTRY;
292 }
293 }
294
295 } else if ((mm->base_va <= table_idx_end_va) ||
296 (region_end_va >= table_idx_va)) {
297
298 /*
299 * Region partially covers block.
300 *
301 * It can't happen in level 3.
302 *
303 * There must be a table descriptor here, if not there
304 * was a problem when mapping the region.
305 */
306
307 assert(level < 3);
308
309 assert(desc_type == TABLE_DESC);
310
311 action = ACTION_RECURSE_INTO_TABLE;
312 }
313
314 if (action == ACTION_WRITE_BLOCK_ENTRY) {
315
316 table_base[table_idx] = INVALID_DESC;
317 xlat_arch_tlbi_va(table_idx_va);
318
319 } else if (action == ACTION_RECURSE_INTO_TABLE) {
320
321 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
322
323 /* Recurse to write into subtable */
324 xlat_tables_unmap_region(ctx, mm, table_idx_va,
325 subtable, XLAT_TABLE_ENTRIES,
326 level + 1);
327
328 /*
329 * If the subtable is now empty, remove its reference.
330 */
331 if (xlat_table_is_empty(ctx, subtable)) {
332 table_base[table_idx] = INVALID_DESC;
333 xlat_arch_tlbi_va(table_idx_va);
334 }
335
336 } else {
337 assert(action == ACTION_NONE);
338 }
339
340 table_idx++;
341 table_idx_va += XLAT_BLOCK_SIZE(level);
342
343 /* If reached the end of the region, exit */
344 if (region_end_va <= table_idx_va)
345 break;
346 }
347
348 if (level > ctx->base_level)
349 xlat_table_dec_regions_count(ctx, table_base);
350}
351
352#endif /* PLAT_XLAT_TABLES_DYNAMIC */
353
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000354/*
355 * From the given arguments, it decides which action to take when mapping the
356 * specified region.
357 */
358static action_t xlat_tables_map_region_action(const mmap_region_t *mm,
359 const int desc_type, const unsigned long long dest_pa,
Sandrine Bailleux12e86442017-07-19 10:11:13 +0100360 const uintptr_t table_entry_base_va, const unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000361{
362 uintptr_t mm_end_va = mm->base_va + mm->size - 1;
363 uintptr_t table_entry_end_va =
364 table_entry_base_va + XLAT_BLOCK_SIZE(level) - 1;
365
366 /*
367 * The descriptor types allowed depend on the current table level.
368 */
369
370 if ((mm->base_va <= table_entry_base_va) &&
371 (mm_end_va >= table_entry_end_va)) {
372
373 /*
374 * Table entry is covered by region
375 * --------------------------------
376 *
377 * This means that this table entry can describe the whole
378 * translation with this granularity in principle.
379 */
380
381 if (level == 3) {
382 /*
383 * Last level, only page descriptors are allowed.
384 */
385 if (desc_type == PAGE_DESC) {
386 /*
387 * There's another region mapped here, don't
388 * overwrite.
389 */
390 return ACTION_NONE;
391 } else {
392 assert(desc_type == INVALID_DESC);
393 return ACTION_WRITE_BLOCK_ENTRY;
394 }
395
396 } else {
397
398 /*
399 * Other levels. Table descriptors are allowed. Block
400 * descriptors too, but they have some limitations.
401 */
402
403 if (desc_type == TABLE_DESC) {
404 /* There's already a table, recurse into it. */
405 return ACTION_RECURSE_INTO_TABLE;
406
407 } else if (desc_type == INVALID_DESC) {
408 /*
409 * There's nothing mapped here, create a new
410 * entry.
411 *
412 * Check if the destination granularity allows
413 * us to use a block descriptor or we need a
414 * finer table for it.
415 *
416 * Also, check if the current level allows block
417 * descriptors. If not, create a table instead.
418 */
419 if ((dest_pa & XLAT_BLOCK_MASK(level)) ||
420 (level < MIN_LVL_BLOCK_DESC))
421 return ACTION_CREATE_NEW_TABLE;
422 else
423 return ACTION_WRITE_BLOCK_ENTRY;
424
425 } else {
426 /*
427 * There's another region mapped here, don't
428 * overwrite.
429 */
430 assert(desc_type == BLOCK_DESC);
431
432 return ACTION_NONE;
433 }
434 }
435
436 } else if ((mm->base_va <= table_entry_end_va) ||
437 (mm_end_va >= table_entry_base_va)) {
438
439 /*
440 * Region partially covers table entry
441 * -----------------------------------
442 *
443 * This means that this table entry can't describe the whole
444 * translation, a finer table is needed.
445
446 * There cannot be partial block overlaps in level 3. If that
447 * happens, some of the preliminary checks when adding the
448 * mmap region failed to detect that PA and VA must at least be
449 * aligned to PAGE_SIZE.
450 */
451 assert(level < 3);
452
453 if (desc_type == INVALID_DESC) {
454 /*
455 * The block is not fully covered by the region. Create
456 * a new table, recurse into it and try to map the
457 * region with finer granularity.
458 */
459 return ACTION_CREATE_NEW_TABLE;
460
461 } else {
462 assert(desc_type == TABLE_DESC);
463 /*
464 * The block is not fully covered by the region, but
465 * there is already a table here. Recurse into it and
466 * try to map with finer granularity.
467 *
468 * PAGE_DESC for level 3 has the same value as
469 * TABLE_DESC, but this code can't run on a level 3
470 * table because there can't be overlaps in level 3.
471 */
472 return ACTION_RECURSE_INTO_TABLE;
473 }
474 }
475
476 /*
477 * This table entry is outside of the region specified in the arguments,
478 * don't write anything to it.
479 */
480 return ACTION_NONE;
481}
482
483/*
484 * Recursive function that writes to the translation tables and maps the
Antonio Nino Diazac998032017-02-27 17:23:54 +0000485 * specified region. On success, it returns the VA of the last byte that was
486 * succesfully mapped. On error, it returns the VA of the next entry that
487 * should have been mapped.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000488 */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000489static uintptr_t xlat_tables_map_region(xlat_ctx_t *ctx, mmap_region_t *mm,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000490 const uintptr_t table_base_va,
491 uint64_t *const table_base,
492 const int table_entries,
Varun Wadekar66231d12017-06-07 09:57:42 -0700493 const unsigned int level)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000494{
495 assert(level >= ctx->base_level && level <= XLAT_TABLE_LEVEL_MAX);
496
497 uintptr_t mm_end_va = mm->base_va + mm->size - 1;
498
499 uintptr_t table_idx_va;
500 unsigned long long table_idx_pa;
501
502 uint64_t *subtable;
503 uint64_t desc;
504
505 int table_idx;
506
507 if (mm->base_va > table_base_va) {
508 /* Find the first index of the table affected by the region. */
509 table_idx_va = mm->base_va & ~XLAT_BLOCK_MASK(level);
510
511 table_idx = (table_idx_va - table_base_va) >>
512 XLAT_ADDR_SHIFT(level);
513
514 assert(table_idx < table_entries);
515 } else {
516 /* Start from the beginning of the table. */
517 table_idx_va = table_base_va;
518 table_idx = 0;
519 }
520
Antonio Nino Diazac998032017-02-27 17:23:54 +0000521#if PLAT_XLAT_TABLES_DYNAMIC
522 if (level > ctx->base_level)
523 xlat_table_inc_regions_count(ctx, table_base);
524#endif
525
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000526 while (table_idx < table_entries) {
527
528 desc = table_base[table_idx];
529
530 table_idx_pa = mm->base_pa + table_idx_va - mm->base_va;
531
532 action_t action = xlat_tables_map_region_action(mm,
533 desc & DESC_MASK, table_idx_pa, table_idx_va, level);
534
535 if (action == ACTION_WRITE_BLOCK_ENTRY) {
536
537 table_base[table_idx] =
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100538 xlat_desc(mm->attr, table_idx_pa, level,
539 ctx->execute_never_mask);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000540
541 } else if (action == ACTION_CREATE_NEW_TABLE) {
542
543 subtable = xlat_table_get_empty(ctx);
Antonio Nino Diazac998032017-02-27 17:23:54 +0000544 if (subtable == NULL) {
545 /* Not enough free tables to map this region */
546 return table_idx_va;
547 }
548
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000549 /* Point to new subtable from this one. */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000550 table_base[table_idx] = TABLE_DESC | (unsigned long)subtable;
551
552 /* Recurse to write into subtable */
553 uintptr_t end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
554 subtable, XLAT_TABLE_ENTRIES,
555 level + 1);
556 if (end_va != table_idx_va + XLAT_BLOCK_SIZE(level) - 1)
557 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000558
559 } else if (action == ACTION_RECURSE_INTO_TABLE) {
560
561 subtable = (uint64_t *)(uintptr_t)(desc & TABLE_ADDR_MASK);
562 /* Recurse to write into subtable */
Antonio Nino Diazac998032017-02-27 17:23:54 +0000563 uintptr_t end_va = xlat_tables_map_region(ctx, mm, table_idx_va,
564 subtable, XLAT_TABLE_ENTRIES,
565 level + 1);
566 if (end_va != table_idx_va + XLAT_BLOCK_SIZE(level) - 1)
567 return end_va;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000568
569 } else {
570
571 assert(action == ACTION_NONE);
572
573 }
574
575 table_idx++;
576 table_idx_va += XLAT_BLOCK_SIZE(level);
577
578 /* If reached the end of the region, exit */
579 if (mm_end_va <= table_idx_va)
580 break;
581 }
Antonio Nino Diazac998032017-02-27 17:23:54 +0000582
583 return table_idx_va - 1;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000584}
585
586void print_mmap(mmap_region_t *const mmap)
587{
588#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
589 tf_printf("mmap:\n");
590 mmap_region_t *mm = mmap;
591
592 while (mm->size) {
593 tf_printf(" VA:%p PA:0x%llx size:0x%zx attr:0x%x\n",
594 (void *)mm->base_va, mm->base_pa,
595 mm->size, mm->attr);
596 ++mm;
597 };
598 tf_printf("\n");
599#endif
600}
601
602/*
603 * Function that verifies that a region can be mapped.
604 * Returns:
605 * 0: Success, the mapping is allowed.
606 * EINVAL: Invalid values were used as arguments.
607 * ERANGE: The memory limits were surpassed.
608 * ENOMEM: There is not enough memory in the mmap array.
609 * EPERM: Region overlaps another one in an invalid way.
610 */
611static int mmap_add_region_check(xlat_ctx_t *ctx, unsigned long long base_pa,
612 uintptr_t base_va, size_t size,
Sandrine Bailleux04980a32017-04-19 14:02:23 +0100613 mmap_attr_t attr)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000614{
615 mmap_region_t *mm = ctx->mmap;
616 unsigned long long end_pa = base_pa + size - 1;
617 uintptr_t end_va = base_va + size - 1;
618
619 if (!IS_PAGE_ALIGNED(base_pa) || !IS_PAGE_ALIGNED(base_va) ||
620 !IS_PAGE_ALIGNED(size))
621 return -EINVAL;
622
623 /* Check for overflows */
624 if ((base_pa > end_pa) || (base_va > end_va))
625 return -ERANGE;
626
627 if ((base_va + (uintptr_t)size - (uintptr_t)1) > ctx->va_max_address)
628 return -ERANGE;
629
630 if ((base_pa + (unsigned long long)size - 1ULL) > ctx->pa_max_address)
631 return -ERANGE;
632
633 /* Check that there is space in the mmap array */
634 if (ctx->mmap[ctx->mmap_num - 1].size != 0)
635 return -ENOMEM;
636
637 /* Check for PAs and VAs overlaps with all other regions */
638 for (mm = ctx->mmap; mm->size; ++mm) {
639
640 uintptr_t mm_end_va = mm->base_va + mm->size - 1;
641
642 /*
643 * Check if one of the regions is completely inside the other
644 * one.
645 */
646 int fully_overlapped_va =
647 ((base_va >= mm->base_va) && (end_va <= mm_end_va)) ||
648 ((mm->base_va >= base_va) && (mm_end_va <= end_va));
649
650 /*
651 * Full VA overlaps are only allowed if both regions are
652 * identity mapped (zero offset) or have the same VA to PA
653 * offset. Also, make sure that it's not the exact same area.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000654 * This can only be done with static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000655 */
656 if (fully_overlapped_va) {
657
Antonio Nino Diazac998032017-02-27 17:23:54 +0000658#if PLAT_XLAT_TABLES_DYNAMIC
659 if ((attr & MT_DYNAMIC) || (mm->attr & MT_DYNAMIC))
660 return -EPERM;
661#endif /* PLAT_XLAT_TABLES_DYNAMIC */
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000662 if ((mm->base_va - mm->base_pa) != (base_va - base_pa))
663 return -EPERM;
664
665 if ((base_va == mm->base_va) && (size == mm->size))
666 return -EPERM;
667
668 } else {
669 /*
670 * If the regions do not have fully overlapping VAs,
671 * then they must have fully separated VAs and PAs.
672 * Partial overlaps are not allowed
673 */
674
675 unsigned long long mm_end_pa =
676 mm->base_pa + mm->size - 1;
677
678 int separated_pa =
679 (end_pa < mm->base_pa) || (base_pa > mm_end_pa);
680 int separated_va =
681 (end_va < mm->base_va) || (base_va > mm_end_va);
682
683 if (!(separated_va && separated_pa))
684 return -EPERM;
685 }
686 }
687
688 return 0;
689}
690
Sandrine Bailleux66342932017-07-18 13:26:36 +0100691void mmap_add_region_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000692{
693 mmap_region_t *mm_cursor = ctx->mmap;
694 mmap_region_t *mm_last = mm_cursor + ctx->mmap_num;
695 unsigned long long end_pa = mm->base_pa + mm->size - 1;
696 uintptr_t end_va = mm->base_va + mm->size - 1;
697 int ret;
698
699 /* Ignore empty regions */
700 if (!mm->size)
701 return;
702
Antonio Nino Diazac998032017-02-27 17:23:54 +0000703 /* Static regions must be added before initializing the xlat tables. */
704 assert(!ctx->initialized);
705
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000706 ret = mmap_add_region_check(ctx, mm->base_pa, mm->base_va, mm->size,
707 mm->attr);
708 if (ret != 0) {
709 ERROR("mmap_add_region_check() failed. error %d\n", ret);
710 assert(0);
711 return;
712 }
713
714 /*
715 * Find correct place in mmap to insert new region.
716 *
717 * 1 - Lower region VA end first.
718 * 2 - Smaller region size first.
719 *
720 * VA 0 0xFF
721 *
722 * 1st |------|
723 * 2nd |------------|
724 * 3rd |------|
725 * 4th |---|
726 * 5th |---|
727 * 6th |----------|
728 * 7th |-------------------------------------|
729 *
730 * This is required for overlapping regions only. It simplifies adding
731 * regions with the loop in xlat_tables_init_internal because the outer
732 * ones won't overwrite block or page descriptors of regions added
733 * previously.
Antonio Nino Diazac998032017-02-27 17:23:54 +0000734 *
735 * Overlapping is only allowed for static regions.
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000736 */
737
738 while ((mm_cursor->base_va + mm_cursor->size - 1) < end_va
739 && mm_cursor->size)
740 ++mm_cursor;
741
742 while ((mm_cursor->base_va + mm_cursor->size - 1 == end_va)
743 && (mm_cursor->size < mm->size))
744 ++mm_cursor;
745
746 /* Make room for new region by moving other regions up by one place */
747 memmove(mm_cursor + 1, mm_cursor,
748 (uintptr_t)mm_last - (uintptr_t)mm_cursor);
749
750 /*
751 * Check we haven't lost the empty sentinel from the end of the array.
752 * This shouldn't happen as we have checked in mmap_add_region_check
753 * that there is free space.
754 */
755 assert(mm_last->size == 0);
756
757 mm_cursor->base_pa = mm->base_pa;
758 mm_cursor->base_va = mm->base_va;
759 mm_cursor->size = mm->size;
760 mm_cursor->attr = mm->attr;
761
762 if (end_pa > ctx->max_pa)
763 ctx->max_pa = end_pa;
764 if (end_va > ctx->max_va)
765 ctx->max_va = end_va;
766}
767
Sandrine Bailleux66342932017-07-18 13:26:36 +0100768void mmap_add_region(unsigned long long base_pa,
769 uintptr_t base_va,
770 size_t size,
771 mmap_attr_t attr)
772{
773 mmap_region_t mm = {
774 .base_va = base_va,
775 .base_pa = base_pa,
776 .size = size,
777 .attr = attr,
778 };
779 mmap_add_region_ctx(&tf_xlat_ctx, &mm);
780}
781
782
783void mmap_add_ctx(xlat_ctx_t *ctx, const mmap_region_t *mm)
784{
785 while (mm->size) {
786 mmap_add_region_ctx(ctx, mm);
787 mm++;
788 }
789}
790
791void mmap_add(const mmap_region_t *mm)
792{
793 mmap_add_ctx(&tf_xlat_ctx, mm);
794}
795
Antonio Nino Diazac998032017-02-27 17:23:54 +0000796#if PLAT_XLAT_TABLES_DYNAMIC
797
798int mmap_add_dynamic_region_ctx(xlat_ctx_t *ctx, mmap_region_t *mm)
799{
800 mmap_region_t *mm_cursor = ctx->mmap;
801 mmap_region_t *mm_last = mm_cursor + ctx->mmap_num;
802 unsigned long long end_pa = mm->base_pa + mm->size - 1;
803 uintptr_t end_va = mm->base_va + mm->size - 1;
804 int ret;
805
806 /* Nothing to do */
807 if (!mm->size)
808 return 0;
809
810 ret = mmap_add_region_check(ctx, mm->base_pa, mm->base_va, mm->size, mm->attr | MT_DYNAMIC);
811 if (ret != 0)
812 return ret;
813
814 /*
815 * Find the adequate entry in the mmap array in the same way done for
816 * static regions in mmap_add_region_ctx().
817 */
818
819 while ((mm_cursor->base_va + mm_cursor->size - 1) < end_va && mm_cursor->size)
820 ++mm_cursor;
821
822 while ((mm_cursor->base_va + mm_cursor->size - 1 == end_va) && (mm_cursor->size < mm->size))
823 ++mm_cursor;
824
825 /* Make room for new region by moving other regions up by one place */
826 memmove(mm_cursor + 1, mm_cursor, (uintptr_t)mm_last - (uintptr_t)mm_cursor);
827
828 /*
829 * Check we haven't lost the empty sentinal from the end of the array.
830 * This shouldn't happen as we have checked in mmap_add_region_check
831 * that there is free space.
832 */
833 assert(mm_last->size == 0);
834
835 mm_cursor->base_pa = mm->base_pa;
836 mm_cursor->base_va = mm->base_va;
837 mm_cursor->size = mm->size;
838 mm_cursor->attr = mm->attr | MT_DYNAMIC;
839
840 /*
841 * Update the translation tables if the xlat tables are initialized. If
842 * not, this region will be mapped when they are initialized.
843 */
844 if (ctx->initialized) {
845 uintptr_t end_va = xlat_tables_map_region(ctx, mm_cursor, 0, ctx->base_table,
846 ctx->base_table_entries, ctx->base_level);
847
848 /* Failed to map, remove mmap entry, unmap and return error. */
849 if (end_va != mm_cursor->base_va + mm_cursor->size - 1) {
850 memmove(mm_cursor, mm_cursor + 1, (uintptr_t)mm_last - (uintptr_t)mm_cursor);
851
852 /*
853 * Check if the mapping function actually managed to map
854 * anything. If not, just return now.
855 */
856 if (mm_cursor->base_va >= end_va)
857 return -ENOMEM;
858
859 /*
860 * Something went wrong after mapping some table entries,
861 * undo every change done up to this point.
862 */
863 mmap_region_t unmap_mm = {
864 .base_pa = 0,
865 .base_va = mm->base_va,
866 .size = end_va - mm->base_va,
867 .attr = 0
868 };
869 xlat_tables_unmap_region(ctx, &unmap_mm, 0, ctx->base_table,
870 ctx->base_table_entries, ctx->base_level);
871
872 return -ENOMEM;
873 }
874
875 /*
876 * Make sure that all entries are written to the memory. There
877 * is no need to invalidate entries when mapping dynamic regions
878 * because new table/block/page descriptors only replace old
879 * invalid descriptors, that aren't TLB cached.
880 */
881 dsbishst();
882 }
883
884 if (end_pa > ctx->max_pa)
885 ctx->max_pa = end_pa;
886 if (end_va > ctx->max_va)
887 ctx->max_va = end_va;
888
889 return 0;
890}
891
Sandrine Bailleux66342932017-07-18 13:26:36 +0100892int mmap_add_dynamic_region(unsigned long long base_pa,
893 uintptr_t base_va, size_t size, mmap_attr_t attr)
894{
895 mmap_region_t mm = {
896 .base_va = base_va,
897 .base_pa = base_pa,
898 .size = size,
899 .attr = attr,
900 };
901 return mmap_add_dynamic_region_ctx(&tf_xlat_ctx, &mm);
902}
903
Antonio Nino Diazac998032017-02-27 17:23:54 +0000904/*
905 * Removes the region with given base Virtual Address and size from the given
906 * context.
907 *
908 * Returns:
909 * 0: Success.
910 * EINVAL: Invalid values were used as arguments (region not found).
911 * EPERM: Tried to remove a static region.
912 */
913int mmap_remove_dynamic_region_ctx(xlat_ctx_t *ctx, uintptr_t base_va,
914 size_t size)
915{
916 mmap_region_t *mm = ctx->mmap;
917 mmap_region_t *mm_last = mm + ctx->mmap_num;
918 int update_max_va_needed = 0;
919 int update_max_pa_needed = 0;
920
921 /* Check sanity of mmap array. */
922 assert(mm[ctx->mmap_num].size == 0);
923
924 while (mm->size) {
925 if ((mm->base_va == base_va) && (mm->size == size))
926 break;
927 ++mm;
928 }
929
930 /* Check that the region was found */
931 if (mm->size == 0)
932 return -EINVAL;
933
934 /* If the region is static it can't be removed */
935 if (!(mm->attr & MT_DYNAMIC))
936 return -EPERM;
937
938 /* Check if this region is using the top VAs or PAs. */
939 if ((mm->base_va + mm->size - 1) == ctx->max_va)
940 update_max_va_needed = 1;
941 if ((mm->base_pa + mm->size - 1) == ctx->max_pa)
942 update_max_pa_needed = 1;
943
944 /* Update the translation tables if needed */
945 if (ctx->initialized) {
946 xlat_tables_unmap_region(ctx, mm, 0, ctx->base_table,
947 ctx->base_table_entries,
948 ctx->base_level);
949 xlat_arch_tlbi_va_sync();
950 }
951
952 /* Remove this region by moving the rest down by one place. */
953 memmove(mm, mm + 1, (uintptr_t)mm_last - (uintptr_t)mm);
954
955 /* Check if we need to update the max VAs and PAs */
956 if (update_max_va_needed) {
957 ctx->max_va = 0;
958 mm = ctx->mmap;
959 while (mm->size) {
960 if ((mm->base_va + mm->size - 1) > ctx->max_va)
961 ctx->max_va = mm->base_va + mm->size - 1;
962 ++mm;
963 }
964 }
965
966 if (update_max_pa_needed) {
967 ctx->max_pa = 0;
968 mm = ctx->mmap;
969 while (mm->size) {
970 if ((mm->base_pa + mm->size - 1) > ctx->max_pa)
971 ctx->max_pa = mm->base_pa + mm->size - 1;
972 ++mm;
973 }
974 }
975
976 return 0;
977}
978
Sandrine Bailleux66342932017-07-18 13:26:36 +0100979int mmap_remove_dynamic_region(uintptr_t base_va, size_t size)
980{
981 return mmap_remove_dynamic_region_ctx(&tf_xlat_ctx,
982 base_va, size);
983}
984
Antonio Nino Diazac998032017-02-27 17:23:54 +0000985#endif /* PLAT_XLAT_TABLES_DYNAMIC */
986
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000987#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
988
989/* Print the attributes of the specified block descriptor. */
Antonio Nino Diazefabaa92017-04-27 13:30:22 +0100990static void xlat_desc_print(uint64_t desc, uint64_t execute_never_mask)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +0000991{
992 int mem_type_index = ATTR_INDEX_GET(desc);
993
994 if (mem_type_index == ATTR_IWBWA_OWBWA_NTR_INDEX) {
995 tf_printf("MEM");
996 } else if (mem_type_index == ATTR_NON_CACHEABLE_INDEX) {
997 tf_printf("NC");
998 } else {
999 assert(mem_type_index == ATTR_DEVICE_INDEX);
1000 tf_printf("DEV");
1001 }
1002
1003 tf_printf(LOWER_ATTRS(AP_RO) & desc ? "-RO" : "-RW");
1004 tf_printf(LOWER_ATTRS(NS) & desc ? "-NS" : "-S");
Antonio Nino Diazefabaa92017-04-27 13:30:22 +01001005 tf_printf(execute_never_mask & desc ? "-XN" : "-EXEC");
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001006}
1007
1008static const char * const level_spacers[] = {
Antonio Nino Diaz755e54f2017-02-13 11:35:49 +00001009 "[LV0] ",
1010 " [LV1] ",
1011 " [LV2] ",
1012 " [LV3] "
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001013};
1014
Antonio Nino Diaz755e54f2017-02-13 11:35:49 +00001015static const char *invalid_descriptors_ommited =
1016 "%s(%d invalid descriptors omitted)\n";
1017
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001018/*
1019 * Recursive function that reads the translation tables passed as an argument
1020 * and prints their status.
1021 */
1022static void xlat_tables_print_internal(const uintptr_t table_base_va,
1023 uint64_t *const table_base, const int table_entries,
Varun Wadekar8bf7f232017-06-16 14:15:34 -07001024 const unsigned int level, const uint64_t execute_never_mask)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001025{
1026 assert(level <= XLAT_TABLE_LEVEL_MAX);
1027
1028 uint64_t desc;
1029 uintptr_t table_idx_va = table_base_va;
1030 int table_idx = 0;
1031
1032 size_t level_size = XLAT_BLOCK_SIZE(level);
1033
Antonio Nino Diaz755e54f2017-02-13 11:35:49 +00001034 /*
1035 * Keep track of how many invalid descriptors are counted in a row.
1036 * Whenever multiple invalid descriptors are found, only the first one
1037 * is printed, and a line is added to inform about how many descriptors
1038 * have been omitted.
1039 */
1040 int invalid_row_count = 0;
1041
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001042 while (table_idx < table_entries) {
1043
1044 desc = table_base[table_idx];
1045
1046 if ((desc & DESC_MASK) == INVALID_DESC) {
1047
Antonio Nino Diaz755e54f2017-02-13 11:35:49 +00001048 if (invalid_row_count == 0) {
1049 tf_printf("%sVA:%p size:0x%zx\n",
1050 level_spacers[level],
1051 (void *)table_idx_va, level_size);
1052 }
1053 invalid_row_count++;
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001054
1055 } else {
1056
Antonio Nino Diaz755e54f2017-02-13 11:35:49 +00001057 if (invalid_row_count > 1) {
1058 tf_printf(invalid_descriptors_ommited,
1059 level_spacers[level],
1060 invalid_row_count - 1);
1061 }
1062 invalid_row_count = 0;
1063
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001064 /*
1065 * Check if this is a table or a block. Tables are only
1066 * allowed in levels other than 3, but DESC_PAGE has the
1067 * same value as DESC_TABLE, so we need to check.
1068 */
1069 if (((desc & DESC_MASK) == TABLE_DESC) &&
1070 (level < XLAT_TABLE_LEVEL_MAX)) {
1071 /*
1072 * Do not print any PA for a table descriptor,
1073 * as it doesn't directly map physical memory
1074 * but instead points to the next translation
1075 * table in the translation table walk.
1076 */
1077 tf_printf("%sVA:%p size:0x%zx\n",
1078 level_spacers[level],
1079 (void *)table_idx_va, level_size);
1080
1081 uintptr_t addr_inner = desc & TABLE_ADDR_MASK;
1082
1083 xlat_tables_print_internal(table_idx_va,
1084 (uint64_t *)addr_inner,
Antonio Nino Diazefabaa92017-04-27 13:30:22 +01001085 XLAT_TABLE_ENTRIES, level+1,
1086 execute_never_mask);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001087 } else {
1088 tf_printf("%sVA:%p PA:0x%llx size:0x%zx ",
1089 level_spacers[level],
1090 (void *)table_idx_va,
1091 (unsigned long long)(desc & TABLE_ADDR_MASK),
1092 level_size);
Antonio Nino Diazefabaa92017-04-27 13:30:22 +01001093 xlat_desc_print(desc, execute_never_mask);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001094 tf_printf("\n");
1095 }
1096 }
1097
1098 table_idx++;
1099 table_idx_va += level_size;
1100 }
Antonio Nino Diaz755e54f2017-02-13 11:35:49 +00001101
1102 if (invalid_row_count > 1) {
1103 tf_printf(invalid_descriptors_ommited,
1104 level_spacers[level], invalid_row_count - 1);
1105 }
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001106}
1107
1108#endif /* LOG_LEVEL >= LOG_LEVEL_VERBOSE */
1109
1110void xlat_tables_print(xlat_ctx_t *ctx)
1111{
1112#if LOG_LEVEL >= LOG_LEVEL_VERBOSE
Sandrine Bailleux4e8f1452017-05-26 15:47:08 +01001113 VERBOSE("Translation tables state:\n");
1114 VERBOSE(" Max allowed PA: 0x%llx\n", ctx->pa_max_address);
1115 VERBOSE(" Max allowed VA: %p\n", (void *) ctx->va_max_address);
1116 VERBOSE(" Max mapped PA: 0x%llx\n", ctx->max_pa);
1117 VERBOSE(" Max mapped VA: %p\n", (void *) ctx->max_va);
1118
1119 VERBOSE(" Initial lookup level: %i\n", ctx->base_level);
1120 VERBOSE(" Entries @initial lookup level: %i\n",
1121 ctx->base_table_entries);
1122
1123 int used_page_tables;
1124#if PLAT_XLAT_TABLES_DYNAMIC
1125 used_page_tables = 0;
Sandrine Bailleuxde6628d2017-08-01 09:16:38 +01001126 for (unsigned int i = 0; i < ctx->tables_num; ++i) {
Sandrine Bailleux4e8f1452017-05-26 15:47:08 +01001127 if (ctx->tables_mapped_regions[i] != 0)
1128 ++used_page_tables;
1129 }
1130#else
1131 used_page_tables = ctx->next_table;
1132#endif
1133 VERBOSE(" Used %i sub-tables out of %i (spare: %i)\n",
1134 used_page_tables, ctx->tables_num,
1135 ctx->tables_num - used_page_tables);
1136
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001137 xlat_tables_print_internal(0, ctx->base_table, ctx->base_table_entries,
Antonio Nino Diazefabaa92017-04-27 13:30:22 +01001138 ctx->base_level, ctx->execute_never_mask);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001139#endif /* LOG_LEVEL >= LOG_LEVEL_VERBOSE */
1140}
1141
Sandrine Bailleux66342932017-07-18 13:26:36 +01001142void init_xlat_tables_ctx(xlat_ctx_t *ctx)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001143{
1144 mmap_region_t *mm = ctx->mmap;
1145
Sandrine Bailleux66342932017-07-18 13:26:36 +01001146 assert(!is_mmu_enabled());
1147 assert(!ctx->initialized);
1148
1149 print_mmap(mm);
1150
1151 ctx->execute_never_mask =
1152 xlat_arch_get_xn_desc(xlat_arch_current_el());
1153
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001154 /* All tables must be zeroed before mapping any region. */
1155
Varun Wadekar66231d12017-06-07 09:57:42 -07001156 for (unsigned int i = 0; i < ctx->base_table_entries; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001157 ctx->base_table[i] = INVALID_DESC;
1158
Varun Wadekar66231d12017-06-07 09:57:42 -07001159 for (unsigned int j = 0; j < ctx->tables_num; j++) {
Antonio Nino Diazac998032017-02-27 17:23:54 +00001160#if PLAT_XLAT_TABLES_DYNAMIC
1161 ctx->tables_mapped_regions[j] = 0;
1162#endif
Varun Wadekar66231d12017-06-07 09:57:42 -07001163 for (unsigned int i = 0; i < XLAT_TABLE_ENTRIES; i++)
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001164 ctx->tables[j][i] = INVALID_DESC;
1165 }
1166
Antonio Nino Diazac998032017-02-27 17:23:54 +00001167 while (mm->size) {
1168 uintptr_t end_va = xlat_tables_map_region(ctx, mm, 0, ctx->base_table,
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001169 ctx->base_table_entries, ctx->base_level);
1170
Antonio Nino Diazac998032017-02-27 17:23:54 +00001171 if (end_va != mm->base_va + mm->size - 1) {
1172 ERROR("Not enough memory to map region:\n"
1173 " VA:%p PA:0x%llx size:0x%zx attr:0x%x\n",
1174 (void *)mm->base_va, mm->base_pa, mm->size, mm->attr);
1175 panic();
1176 }
1177
1178 mm++;
1179 }
1180
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001181 assert(ctx->pa_max_address <= xlat_arch_get_max_supported_pa());
Sandrine Bailleux66342932017-07-18 13:26:36 +01001182 assert(ctx->max_va <= ctx->va_max_address);
1183 assert(ctx->max_pa <= ctx->pa_max_address);
1184
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +01001185 ctx->initialized = 1;
1186
1187 xlat_tables_print(ctx);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001188}
1189
1190void init_xlat_tables(void)
1191{
1192 init_xlat_tables_ctx(&tf_xlat_ctx);
Antonio Nino Diaz233c7c12017-03-08 14:40:23 +00001193}
Sandrine Bailleux66342932017-07-18 13:26:36 +01001194
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +01001195/*
1196 * If dynamic allocation of new regions is disabled then by the time we call the
1197 * function enabling the MMU, we'll have registered all the memory regions to
1198 * map for the system's lifetime. Therefore, at this point we know the maximum
1199 * physical address that will ever be mapped.
1200 *
1201 * If dynamic allocation is enabled then we can't make any such assumption
1202 * because the maximum physical address could get pushed while adding a new
1203 * region. Therefore, in this case we have to assume that the whole address
1204 * space size might be mapped.
1205 */
1206#ifdef PLAT_XLAT_TABLES_DYNAMIC
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001207#define MAX_PHYS_ADDR tf_xlat_ctx.pa_max_address
Sandrine Bailleuxc5b63772017-05-31 13:31:48 +01001208#else
1209#define MAX_PHYS_ADDR tf_xlat_ctx.max_pa
1210#endif
1211
Sandrine Bailleux66342932017-07-18 13:26:36 +01001212#ifdef AARCH32
1213
1214void enable_mmu_secure(unsigned int flags)
1215{
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001216 enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
1217 tf_xlat_ctx.va_max_address);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001218}
1219
1220#else
1221
1222void enable_mmu_el1(unsigned int flags)
1223{
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001224 enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
1225 tf_xlat_ctx.va_max_address);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001226}
1227
1228void enable_mmu_el3(unsigned int flags)
1229{
Sandrine Bailleux46c53a22017-07-11 15:11:10 +01001230 enable_mmu_arch(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
1231 tf_xlat_ctx.va_max_address);
Sandrine Bailleux66342932017-07-18 13:26:36 +01001232}
1233
1234#endif /* AARCH32 */