blob: 0e5c1420c61547b97d01dbca71274acb9bc839dd [file] [log] [blame]
Soby Mathewec8ac1c2016-05-05 14:32:05 +01001#
Chris Kay68d28362023-01-16 16:53:45 +00002# Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
Soby Mathewec8ac1c2016-05-05 14:32:05 +01003#
dp-armfa3cf0b2017-05-03 09:38:09 +01004# SPDX-License-Identifier: BSD-3-Clause
Soby Mathewec8ac1c2016-05-05 14:32:05 +01005#
6
7ifneq (${ARCH}, aarch32)
8 $(error SP_MIN is only supported on AArch32 platforms)
9endif
10
Chris Kay1000ea82021-05-19 19:24:37 +010011include lib/extensions/amu/amu.mk
Soby Mathewec8ac1c2016-05-05 14:32:05 +010012include lib/psci/psci_lib.mk
13
14INCLUDES += -Iinclude/bl32/sp_min
15
16BL32_SOURCES += bl32/sp_min/sp_min_main.c \
17 bl32/sp_min/aarch32/entrypoint.S \
18 common/runtime_svc.c \
Soby Mathew6d07e672018-03-01 10:53:33 +000019 plat/common/aarch32/plat_sp_min_common.c\
Soby Mathewec8ac1c2016-05-05 14:32:05 +010020 services/std_svc/std_svc_setup.c \
21 ${PSCI_LIB_SOURCES}
22
Javier Almansa Sobrinof3a4c542020-11-23 18:38:15 +000023ifeq (${DISABLE_MTPMU},1)
24BL32_SOURCES += lib/extensions/mtpmu/aarch32/mtpmu.S
25endif
26
Soby Mathewec8ac1c2016-05-05 14:32:05 +010027ifeq (${ENABLE_PMF}, 1)
28BL32_SOURCES += lib/pmf/pmf_main.c
29endif
30
Andre Przywara0b7f1b02023-03-21 13:53:19 +000031ifneq (${ENABLE_FEAT_AMU},0)
Chris Kay1000ea82021-05-19 19:24:37 +010032BL32_SOURCES += ${AMU_SOURCES}
Dimitris Papastamosdda48b02017-10-17 14:03:14 +010033endif
34
Dimitris Papastamos0a4cded2018-01-02 11:37:02 +000035ifeq (${WORKAROUND_CVE_2017_5715},1)
Dimitris Papastamos570c06a2018-04-06 15:29:34 +010036BL32_SOURCES += bl32/sp_min/wa_cve_2017_5715_bpiall.S \
37 bl32/sp_min/wa_cve_2017_5715_icache_inv.S
John Powell7f7c6fa2022-04-14 19:10:17 -050038else
39ifeq (${WORKAROUND_CVE_2022_23960},1)
40BL32_SOURCES += bl32/sp_min/wa_cve_2017_5715_icache_inv.S
41endif
Dimitris Papastamos0a4cded2018-01-02 11:37:02 +000042endif
43
Andre Przywaraf91762b2021-02-08 18:07:23 +000044ifeq (${TRNG_SUPPORT},1)
45BL32_SOURCES += services/std_svc/trng/trng_main.c \
46 services/std_svc/trng/trng_entropy_pool.c
47endif
48
Andre Przywara44e33e02022-11-17 16:42:09 +000049ifneq (${ENABLE_SYS_REG_TRACE_FOR_NS},0)
Manish V Badarkhef356f7e2021-06-29 11:44:20 +010050BL32_SOURCES += lib/extensions/sys_reg_trace/aarch32/sys_reg_trace.c
51endif
52
Andre Przywara06ea44e2022-11-17 17:30:43 +000053ifneq (${ENABLE_TRF_FOR_NS},0)
Manish V Badarkhe51a97112021-07-08 09:33:18 +010054BL32_SOURCES += lib/extensions/trf/aarch32/trf.c
55endif
56
Chris Kay68d28362023-01-16 16:53:45 +000057BL32_DEFAULT_LINKER_SCRIPT_SOURCE := bl32/sp_min/sp_min.ld.S
Soby Mathewec8ac1c2016-05-05 14:32:05 +010058
59# Include the platform-specific SP_MIN Makefile
60# If no platform-specific SP_MIN Makefile exists, it means SP_MIN is not supported
61# on this platform.
62SP_MIN_PLAT_MAKEFILE := $(wildcard ${PLAT_DIR}/sp_min/sp_min-${PLAT}.mk)
63ifeq (,${SP_MIN_PLAT_MAKEFILE})
64 $(error SP_MIN is not supported on platform ${PLAT})
65else
66 include ${SP_MIN_PLAT_MAKEFILE}
67endif
68
Yatharth Kochar1c16a4c2016-06-30 14:50:58 +010069RESET_TO_SP_MIN := 0
Soby Mathewec8ac1c2016-05-05 14:32:05 +010070$(eval $(call add_define,RESET_TO_SP_MIN))
71$(eval $(call assert_boolean,RESET_TO_SP_MIN))
Etienne Carrieredc0fea72017-08-09 15:48:53 +020072
73# Flag to allow SP_MIN to handle FIQ interrupts in monitor mode. The platform
74# port is free to override this value. It is default disabled.
75SP_MIN_WITH_SECURE_FIQ ?= 0
76$(eval $(call add_define,SP_MIN_WITH_SECURE_FIQ))
77$(eval $(call assert_boolean,SP_MIN_WITH_SECURE_FIQ))