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Zelalem Awekec43c5632021-07-12 23:41:05 -05001/*
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +00002 * Copyright (c) 2021-2022, ARM Limited and Contributors. All rights reserved.
Zelalem Awekec43c5632021-07-12 23:41:05 -05003 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6#ifndef ARM_PAS_DEF_H
7#define ARM_PAS_DEF_H
8
johpow019d134022021-06-16 17:57:28 -05009#include <lib/gpt_rme/gpt_rme.h>
Zelalem Awekec43c5632021-07-12 23:41:05 -050010#include <plat/arm/common/arm_def.h>
11
12/*****************************************************************************
13 * PAS regions used to initialize the Granule Protection Table (GPT)
14 ****************************************************************************/
15
16/*
17 * The PA space is initially mapped in the GPT as follows:
18 *
19 * ============================================================================
20 * Base Addr| Size |L? GPT|PAS |Content |Comment
21 * ============================================================================
22 * 0GB | 1GB |L0 GPT|ANY |TBROM (EL3 code) |Fixed mapping
23 * | | | |TSRAM (EL3 data) |
AlexeiFedorovaa442492022-11-29 13:32:41 +000024 * 00000000 | | | |IO (incl.UARTs & GIC) |
Zelalem Awekec43c5632021-07-12 23:41:05 -050025 * ----------------------------------------------------------------------------
26 * 1GB | 1GB |L0 GPT|ANY |IO |Fixed mapping
AlexeiFedorovaa442492022-11-29 13:32:41 +000027 * 40000000 | | | | |
Zelalem Awekec43c5632021-07-12 23:41:05 -050028 * ----------------------------------------------------------------------------
AlexeiFedorovaa442492022-11-29 13:32:41 +000029 * 2GB |2GB-64MB |L1 GPT|NS |DRAM (NS Kernel) |Use T.Descrip
30 * 80000000 | | | | |
Zelalem Awekec43c5632021-07-12 23:41:05 -050031 * ----------------------------------------------------------------------------
AlexeiFedorovaa442492022-11-29 13:32:41 +000032 * 4GB-64MB |64MB-32MB-4MB|L1 GPT|SECURE|DRAM TZC |Use T.Descrip
33 * FC000000 | | | | |
Zelalem Awekec43c5632021-07-12 23:41:05 -050034 * ----------------------------------------------------------------------------
35 * 4GB-32MB | | | | |
36 * -3MB-1MB |32MB |L1 GPT|REALM |RMM |Use T.Descrip
AlexeiFedorovaa442492022-11-29 13:32:41 +000037 * FDC00000 | | | | |
Zelalem Awekec43c5632021-07-12 23:41:05 -050038 * ----------------------------------------------------------------------------
39 * 4GB-3MB | | | | |
40 * -1MB |3MB |L1 GPT|ROOT |EL3 DRAM data |Use T.Descrip
AlexeiFedorovaa442492022-11-29 13:32:41 +000041 * FFC00000 | | | | |
Zelalem Awekec43c5632021-07-12 23:41:05 -050042 * ----------------------------------------------------------------------------
43 * 4GB-1MB |1MB |L1 GPT|ROOT |DRAM (L1 GPTs, SCP TZC) |Fixed mapping
AlexeiFedorovaa442492022-11-29 13:32:41 +000044 * FFF00000 | | | | |
45 * ----------------------------------------------------------------------------
46 * 34GB |2GB |L1 GPT|NS |DRAM (NS Kernel) |Use T.Descrip
47 * 880000000| | | | |
Zelalem Awekec43c5632021-07-12 23:41:05 -050048 * ============================================================================
49 *
50 * - 4KB of L0 GPT reside in TSRAM, on top of the CONFIG section.
51 * - ~1MB of L1 GPTs reside at the top of DRAM1 (TZC area).
johpow019d134022021-06-16 17:57:28 -050052 * - The first 1GB region has GPT_GPI_ANY and, therefore, is not protected by
Zelalem Awekec43c5632021-07-12 23:41:05 -050053 * the GPT.
54 * - The DRAM TZC area is split into three regions: the L1 GPT region and
johpow019d134022021-06-16 17:57:28 -050055 * 3MB of region below that are defined as GPT_GPI_ROOT, 32MB Realm region
56 * below that is defined as GPT_GPI_REALM and the rest of it is defined as
57 * GPT_GPI_SECURE.
Zelalem Awekec43c5632021-07-12 23:41:05 -050058 */
59
60/* TODO: This might not be the best way to map the PAS */
61
62/* Device memory 0 to 2GB */
63#define ARM_PAS_1_BASE (U(0))
AlexeiFedorovaa442492022-11-29 13:32:41 +000064#define ARM_PAS_1_SIZE ((ULL(1) << 31)) /* 2GB */
Zelalem Awekec43c5632021-07-12 23:41:05 -050065
66/* NS memory 2GB to (end - 64MB) */
67#define ARM_PAS_2_BASE (ARM_PAS_1_BASE + ARM_PAS_1_SIZE)
68#define ARM_PAS_2_SIZE (ARM_NS_DRAM1_SIZE)
69
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +000070/* Shared area between EL3 and RMM */
71#define ARM_PAS_SHARED_BASE (ARM_EL3_RMM_SHARED_BASE)
72#define ARM_PAS_SHARED_SIZE (ARM_EL3_RMM_SHARED_SIZE)
73
Zelalem Awekec43c5632021-07-12 23:41:05 -050074/* Secure TZC region */
75#define ARM_PAS_3_BASE (ARM_AP_TZC_DRAM1_BASE)
76#define ARM_PAS_3_SIZE (ARM_AP_TZC_DRAM1_SIZE)
77
AlexeiFedorovaa442492022-11-29 13:32:41 +000078/* NS memory 2GB */
79#define ARM_PAS_4_BASE ARM_DRAM2_BASE
80#define ARM_PAS_4_SIZE ((ULL(1) << 31)) /* 2GB */
81
johpow019d134022021-06-16 17:57:28 -050082#define ARM_PAS_GPI_ANY MAP_GPT_REGION(ARM_PAS_1_BASE, \
83 ARM_PAS_1_SIZE, \
84 GPT_GPI_ANY)
AlexeiFedorovaa442492022-11-29 13:32:41 +000085
johpow019d134022021-06-16 17:57:28 -050086#define ARM_PAS_KERNEL GPT_MAP_REGION_GRANULE(ARM_PAS_2_BASE, \
87 ARM_PAS_2_SIZE, \
88 GPT_GPI_NS)
Zelalem Awekec43c5632021-07-12 23:41:05 -050089
johpow019d134022021-06-16 17:57:28 -050090#define ARM_PAS_SECURE GPT_MAP_REGION_GRANULE(ARM_PAS_3_BASE, \
91 ARM_PAS_3_SIZE, \
92 GPT_GPI_SECURE)
Zelalem Awekec43c5632021-07-12 23:41:05 -050093
AlexeiFedorovaa442492022-11-29 13:32:41 +000094#define ARM_PAS_KERNEL_1 GPT_MAP_REGION_GRANULE(ARM_PAS_4_BASE, \
95 ARM_PAS_4_SIZE, \
96 GPT_GPI_NS)
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +000097/*
98 * REALM and Shared area share the same PAS, so consider them a single
99 * PAS region to configure in GPT.
100 */
johpow019d134022021-06-16 17:57:28 -0500101#define ARM_PAS_REALM GPT_MAP_REGION_GRANULE(ARM_REALM_BASE, \
Javier Almansa Sobrino7176a772021-11-24 18:37:37 +0000102 (ARM_PAS_SHARED_SIZE + \
103 ARM_REALM_SIZE), \
johpow019d134022021-06-16 17:57:28 -0500104 GPT_GPI_REALM)
Zelalem Awekec43c5632021-07-12 23:41:05 -0500105
johpow019d134022021-06-16 17:57:28 -0500106#define ARM_PAS_EL3_DRAM GPT_MAP_REGION_GRANULE(ARM_EL3_TZC_DRAM1_BASE, \
107 ARM_EL3_TZC_DRAM1_SIZE, \
108 GPT_GPI_ROOT)
Zelalem Awekec43c5632021-07-12 23:41:05 -0500109
johpow019d134022021-06-16 17:57:28 -0500110#define ARM_PAS_GPTS GPT_MAP_REGION_GRANULE(ARM_L1_GPT_ADDR_BASE, \
111 ARM_L1_GPT_SIZE, \
112 GPT_GPI_ROOT)
Zelalem Awekec43c5632021-07-12 23:41:05 -0500113
Zelalem Aweke5085abd2021-07-13 17:19:54 -0500114/* GPT Configuration options */
Zelalem Aweke5085abd2021-07-13 17:19:54 -0500115#define PLATFORM_L0GPTSZ GPCCR_L0GPTSZ_30BITS
116
Zelalem Awekec43c5632021-07-12 23:41:05 -0500117#endif /* ARM_PAS_DEF_H */