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developer2189d3a2020-04-17 17:14:23 +08001#
2# Copyright (c) 2020, MediaTek Inc. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7MTK_PLAT := plat/mediatek
8MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
9
10PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
11 -I${MTK_PLAT_SOC}/include/
12
developerf9b56842020-06-09 13:38:35 +080013GICV3_SUPPORT_GIC600 := 1
developer2189d3a2020-04-17 17:14:23 +080014include drivers/arm/gic/v3/gicv3.mk
15include lib/xlat_tables_v2/xlat_tables.mk
16
17PLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \
18 ${XLAT_TABLES_LIB_SRCS} \
19 plat/common/aarch64/crash_console_helpers.S \
20 plat/common/plat_psci_common.c
21
22BL31_SOURCES += common/desc_image_load.c \
23 drivers/ti/uart/aarch64/16550_console.S \
24 lib/bl_aux_params/bl_aux_params.c \
25 lib/cpus/aarch64/cortex_a55.S \
26 lib/cpus/aarch64/cortex_a76.S \
27 plat/common/plat_gicv3.c \
28 ${MTK_PLAT}/common/mtk_plat_common.c \
29 ${MTK_PLAT}/common/params_setup.c \
30 ${MTK_PLAT_SOC}/aarch64/platform_common.c \
31 ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \
32 ${MTK_PLAT_SOC}/bl31_plat_setup.c \
33 ${MTK_PLAT_SOC}/plat_pm.c \
developerf9b56842020-06-09 13:38:35 +080034 ${MTK_PLAT_SOC}/plat_topology.c \
35 ${MTK_PLAT_SOC}/plat_mt_gic.c
developer2189d3a2020-04-17 17:14:23 +080036
37
38# Configs for A76 and A55
39HW_ASSISTED_COHERENCY := 1
40USE_COHERENT_MEM := 0
41CTX_INCLUDE_AARCH32_REGS := 0
42
43# indicate the reset vector address can be programmed
44PROGRAMMABLE_RESET_ADDRESS := 1
45
46COLD_BOOT_SINGLE_CPU := 1
47
48MACH_MT8192 := 1
49$(eval $(call add_define,MACH_MT8192))
50
51include lib/coreboot/coreboot.mk
52