blob: b882dc823c07e7e4a413ff90d07c3501907881df [file] [log] [blame]
Pranav Madhu40ebb322021-01-27 16:17:32 +05301# Copyright (c) 2020-2021, ARM Limited and Contributors. All rights reserved.
Aditya Angadid61740b2020-11-19 18:05:33 +05302#
3# SPDX-License-Identifier: BSD-3-Clause
4#
5
Aditya Angadiccae8a12021-08-09 09:38:58 +05306RD_N2_VARIANTS := 0 1 2
7ifneq ($(CSS_SGI_PLATFORM_VARIANT),\
8 $(filter $(CSS_SGI_PLATFORM_VARIANT),$(RD_N2_VARIANTS)))
9 $(error "CSS_SGI_PLATFORM_VARIANT for RD-N2 should be 0, 1 or 2, currently set \
10 to ${CSS_SGI_PLATFORM_VARIANT}.")
11endif
12
13$(eval $(call CREATE_SEQ,SEQ,4))
14ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
15 $(error "Chip count for RD-N2-MC should be either $(SEQ) \
16 currently it is set to ${CSS_SGI_CHIP_COUNT}.")
17endif
18
Andre Przywarab6c24ce2021-07-20 19:20:07 +010019# RD-N2 platform uses GIC-700 which is based on GICv4.1
Aditya Angadid61740b2020-11-19 18:05:33 +053020GIC_ENABLE_V4_EXTN := 1
21
Aditya Angadiccae8a12021-08-09 09:38:58 +053022#Enable GIC Multichip Extension only for Multichip Platforms
23ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2)
24GICV3_IMPL_GIC600_MULTICHIP := 1
25endif
26
Aditya Angadid61740b2020-11-19 18:05:33 +053027include plat/arm/css/sgi/sgi-common.mk
28
29RDN2_BASE = plat/arm/board/rdn2
30
31PLAT_INCLUDES += -I${RDN2_BASE}/include/
32
Tony K Nadackale23ca812021-08-19 14:44:11 +010033SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n2.S \
34 lib/cpus/aarch64/neoverse_demeter.S
Aditya Angadid61740b2020-11-19 18:05:33 +053035
36PLAT_BL_COMMON_SOURCES += ${CSS_ENT_BASE}/sgi_plat_v2.c
37
38BL1_SOURCES += ${SGI_CPU_SOURCES} \
39 ${RDN2_BASE}/rdn2_err.c
40
41BL2_SOURCES += ${RDN2_BASE}/rdn2_plat.c \
42 ${RDN2_BASE}/rdn2_security.c \
43 ${RDN2_BASE}/rdn2_err.c \
44 lib/utils/mem_region.c \
45 drivers/arm/tzc/tzc400.c \
46 plat/arm/common/arm_tzc400.c \
47 plat/arm/common/arm_nor_psci_mem_protect.c
48
49BL31_SOURCES += ${SGI_CPU_SOURCES} \
50 ${RDN2_BASE}/rdn2_plat.c \
51 ${RDN2_BASE}/rdn2_topology.c \
52 drivers/cfi/v2m/v2m_flash.c \
53 lib/utils/mem_region.c \
54 plat/arm/common/arm_nor_psci_mem_protect.c
55
56ifeq (${TRUSTED_BOARD_BOOT}, 1)
57BL1_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c
58BL2_SOURCES += ${RDN2_BASE}/rdn2_trusted_boot.c
59endif
60
Aditya Angadiccae8a12021-08-09 09:38:58 +053061ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2)
62BL31_SOURCES += drivers/arm/gic/v3/gic600_multichip.c
63
64# Enable dynamic addition of MMAP regions in BL31
65BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC
66endif
67
Aditya Angadid61740b2020-11-19 18:05:33 +053068# Add the FDT_SOURCES and options for Dynamic Config
69FDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_fw_config.dts \
70 ${RDN2_BASE}/fdts/${PLAT}_tb_fw_config.dts
71FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
72TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
73
74# Add the FW_CONFIG to FIP and specify the same to certtool
75$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
76# Add the TB_FW_CONFIG to FIP and specify the same to certtool
77$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
78
79FDT_SOURCES += ${RDN2_BASE}/fdts/${PLAT}_nt_fw_config.dts
80NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
81
82# Add the NT_FW_CONFIG to FIP and specify the same to certtool
83$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
84
85override CTX_INCLUDE_AARCH32_REGS := 0
Pranav Madhu40ebb322021-01-27 16:17:32 +053086override ENABLE_AMU := 1