| Sandrine Bailleux | 0123b8c | 2024-01-23 15:30:48 +0100 | [diff] [blame^] | 1 | .. _build_options_arm_fvp_platform: |
| 2 | |
| 3 | Arm FVP Platform Specific Build Options |
| 4 | --------------------------------------- |
| 5 | |
| 6 | - ``FVP_CLUSTER_COUNT`` : Configures the cluster count to be used to |
| 7 | build the topology tree within TF-A. By default TF-A is configured for dual |
| 8 | cluster topology and this option can be used to override the default value. |
| 9 | |
| 10 | - ``FVP_INTERCONNECT_DRIVER``: Selects the interconnect driver to be built. The |
| 11 | default interconnect driver depends on the value of ``FVP_CLUSTER_COUNT`` as |
| 12 | explained in the options below: |
| 13 | |
| 14 | - ``FVP_CCI`` : The CCI driver is selected. This is the default |
| 15 | if 0 < ``FVP_CLUSTER_COUNT`` <= 2. |
| 16 | - ``FVP_CCN`` : The CCN driver is selected. This is the default |
| 17 | if ``FVP_CLUSTER_COUNT`` > 2. |
| 18 | |
| 19 | - ``FVP_MAX_CPUS_PER_CLUSTER``: Sets the maximum number of CPUs implemented in |
| 20 | a single cluster. This option defaults to 4. |
| 21 | |
| 22 | - ``FVP_MAX_PE_PER_CPU``: Sets the maximum number of PEs implemented on any CPU |
| 23 | in the system. This option defaults to 1. Note that the build option |
| 24 | ``ARM_PLAT_MT`` doesn't have any effect on FVP platforms. |
| 25 | |
| 26 | - ``FVP_USE_GIC_DRIVER`` : Selects the GIC driver to be built. Options: |
| 27 | |
| 28 | - ``FVP_GICV2`` : The GICv2 only driver is selected |
| 29 | - ``FVP_GICV3`` : The GICv3 only driver is selected (default option) |
| 30 | |
| 31 | - ``FVP_HW_CONFIG_DTS`` : Specify the path to the DTS file to be compiled |
| 32 | to DTB and packaged in FIP as the HW_CONFIG. See :ref:`Firmware Design` for |
| 33 | details on HW_CONFIG. By default, this is initialized to a sensible DTS |
| 34 | file in ``fdts/`` folder depending on other build options. But some cases, |
| 35 | like shifted affinity format for MPIDR, cannot be detected at build time |
| 36 | and this option is needed to specify the appropriate DTS file. |
| 37 | |
| 38 | - ``FVP_HW_CONFIG`` : Specify the path to the HW_CONFIG blob to be packaged in |
| 39 | FIP. See :ref:`Firmware Design` for details on HW_CONFIG. This option is |
| 40 | similar to the ``FVP_HW_CONFIG_DTS`` option, but it directly specifies the |
| 41 | HW_CONFIG blob instead of the DTS file. This option is useful to override |
| 42 | the default HW_CONFIG selected by the build system. |
| 43 | |
| 44 | - ``FVP_GICR_REGION_PROTECTION``: Mark the redistributor pages of |
| 45 | inactive/fused CPU cores as read-only. The default value of this option |
| 46 | is ``0``, which means the redistributor pages of all CPU cores are marked |
| 47 | as read and write. |
| 48 | |
| 49 | -------------- |
| 50 | |
| 51 | *Copyright (c) 2019-2024, Arm Limited. All rights reserved.* |