fix(intel): fix hardcoded mpu frequency ticks
This patch is used to update the hardcoded mpu freq ticks
to obtain the freqq from the hardware setting itself.
Change-Id: I7b9eb49f2512b85fb477110f06ae86ef289aee58
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
diff --git a/plat/intel/soc/stratix10/include/socfpga_plat_def.h b/plat/intel/soc/stratix10/include/socfpga_plat_def.h
index 7c9f15a..81296a3 100644
--- a/plat/intel/soc/stratix10/include/socfpga_plat_def.h
+++ b/plat/intel/soc/stratix10/include/socfpga_plat_def.h
@@ -83,7 +83,7 @@
#define PLAT_GICD_BASE (PLAT_GIC_BASE + 0x1000)
#define PLAT_GICR_BASE 0
-#define PLAT_SYS_COUNTER_FREQ_IN_TICKS (400000000)
+#define PLAT_SYS_COUNTER_FREQ_IN_TICKS (get_mpu_periph_clk() * PLAT_HZ_CONVERT_TO_MHZ)
#define PLAT_HZ_CONVERT_TO_MHZ (1000000)
/*******************************************************************************
@@ -99,7 +99,7 @@
#define L2_RESET_DONE_REG 0xFFD12218
/* Platform specific system counter */
-#define PLAT_SYS_COUNTER_FREQ_IN_MHZ get_cpu_clk()
+#define PLAT_SYS_COUNTER_FREQ_IN_MHZ get_mpu_periph_clk()
#endif /* PLATSOCFPGA_DEF_H */