SPM: Remove SP memory mappings definitions
This information is retrieved from the resource description now.
Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094
Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/include/plat/arm/common/arm_spm_def.h b/include/plat/arm/common/arm_spm_def.h
index a222099..6fa5615 100644
--- a/include/plat/arm/common/arm_spm_def.h
+++ b/include/plat/arm/common/arm_spm_def.h
@@ -27,6 +27,9 @@
ARM_SP_IMAGE_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
#endif
+
+#if SPM_DEPRECATED
+
#ifdef IMAGE_BL31
/* SPM Payload memory. Mapped as code in S-EL1 */
#define ARM_SP_IMAGE_MMAP MAP_REGION2( \
@@ -96,6 +99,8 @@
/* Total number of memory regions with distinct properties */
#define ARM_SP_IMAGE_NUM_MEM_REGIONS 6
+#endif /* SPM_DEPRECATED */
+
/* Cookies passed to the Secure Partition at boot. Not used by ARM platforms. */
#define PLAT_SPM_COOKIE_0 ULL(0)
#define PLAT_SPM_COOKIE_1 ULL(0)
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index e7082d0..9b45984 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -37,7 +37,7 @@
* - Region 1 with secure access only;
* - the remaining DRAM regions access from the given Non-Secure masters.
******************************************************************************/
-#if ENABLE_SPM
+#if ENABLE_SPM && SPM_DEPRECATED
#define ARM_TZC_REGIONS_DEF \
{ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END, \
TZC_REGION_S_RDWR, 0}, \
diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index 4ef8667..66650ee 100644
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -124,13 +124,13 @@
MAP_DEVICE0,
MAP_DEVICE1,
ARM_V2M_MAP_MEM_PROTECT,
-#if ENABLE_SPM
+#if ENABLE_SPM && SPM_DEPRECATED
ARM_SPM_BUF_EL3_MMAP,
#endif
{0}
};
-#if ENABLE_SPM && defined(IMAGE_BL31)
+#if ENABLE_SPM && defined(IMAGE_BL31) && SPM_DEPRECATED
const mmap_region_t plat_arm_secure_partition_mmap[] = {
V2M_MAP_IOFPGA_EL0, /* for the UART */
MAP_REGION_FLAT(DEVICE0_BASE, \
@@ -232,7 +232,6 @@
{
return &plat_arm_secure_partition_boot_info;
}
-
#endif
/*******************************************************************************
diff --git a/services/std_svc/spm/sp_setup.c b/services/std_svc/spm/sp_setup.c
index 04eedff..b1f651f 100644
--- a/services/std_svc/spm/sp_setup.c
+++ b/services/std_svc/spm/sp_setup.c
@@ -13,7 +13,6 @@
#include <debug.h>
#include <platform_def.h>
#include <platform.h>
-#include <secure_partition.h>
#include <string.h>
#include <xlat_tables_v2.h>
@@ -39,57 +38,24 @@
ep_info.spsr = SPSR_64(MODE_EL0, MODE_SP_EL0, DISABLE_ALL_EXCEPTIONS);
/*
- * X0: Virtual address of a buffer shared between EL3 and Secure EL0.
- * The buffer will be mapped in the Secure EL1 translation regime
- * with Normal IS WBWA attributes and RO data and Execute Never
- * instruction access permissions.
- *
- * X1: Size of the buffer in bytes
- *
+ * X0: Unused (MBZ).
+ * X1: Unused (MBZ).
* X2: cookie value (Implementation Defined)
- *
* X3: cookie value (Implementation Defined)
- *
* X4 to X7 = 0
*/
- ep_info.args.arg0 = PLAT_SPM_BUF_BASE;
- ep_info.args.arg1 = PLAT_SPM_BUF_SIZE;
+ ep_info.args.arg0 = 0;
+ ep_info.args.arg1 = 0;
ep_info.args.arg2 = PLAT_SPM_COOKIE_0;
ep_info.args.arg3 = PLAT_SPM_COOKIE_1;
cm_setup_context(ctx, &ep_info);
/*
- * SP_EL0: A non-zero value will indicate to the SP that the SPM has
- * initialized the stack pointer for the current CPU through
- * implementation defined means. The value will be 0 otherwise.
- */
- write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_SP_EL0,
- PLAT_SP_IMAGE_STACK_BASE + PLAT_SP_IMAGE_STACK_PCPU_SIZE);
-
- /*
* Setup translation tables
* ------------------------
*/
-#if ENABLE_ASSERTIONS
-
- /* Get max granularity supported by the platform. */
- unsigned int max_granule = xlat_arch_get_max_supported_granule_size();
-
- VERBOSE("Max translation granule size supported: %u KiB\n",
- max_granule / 1024U);
-
- unsigned int max_granule_mask = max_granule - 1U;
-
- /* Base must be aligned to the max granularity */
- assert((ARM_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
-
- /* Size must be a multiple of the max granularity */
- assert((ARM_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
-
-#endif /* ENABLE_ASSERTIONS */
-
/* This region contains the exception vectors used at S-EL1. */
const mmap_region_t sel1_exception_vectors =
MAP_REGION_FLAT(SPM_SHIM_EXCEPTIONS_START,
diff --git a/services/std_svc/spm/sp_xlat.c b/services/std_svc/spm/sp_xlat.c
index 3527138..881d97f 100644
--- a/services/std_svc/spm/sp_xlat.c
+++ b/services/std_svc/spm/sp_xlat.c
@@ -10,7 +10,6 @@
#include <errno.h>
#include <platform_def.h>
#include <platform.h>
-#include <secure_partition.h>
#include <spm_svc.h>
#include <xlat_tables_v2.h>
diff --git a/services/std_svc/spm/spm_main.c b/services/std_svc/spm/spm_main.c
index 880e86e..ad1262c 100644
--- a/services/std_svc/spm/spm_main.c
+++ b/services/std_svc/spm/spm_main.c
@@ -14,7 +14,6 @@
#include <mm_svc.h>
#include <platform.h>
#include <runtime_svc.h>
-#include <secure_partition.h>
#include <smccc.h>
#include <smccc_helpers.h>
#include <spinlock.h>