fix(fvp): don't check MPIDRs with the power controller in BL1
The core platform layer requires an implementation for the
`plat_core_pos_by_mpidr` function. This implementation is currently
missing in BL1, which causes undefined reference errors when linking
with LTO.
The FVP platform source file providing this implementation is the
`fvp_topology.c` file, so this change adds it to the BL1 sources for the
FVP.
However, the implementation of this function reaches out to the FVP
power controller driver - `fvp_pm.c` - to validate the MPIDR, and this
file has at least two other dependencies:
- `spe.c`
- `arm_gicvX.c`
Pulling these in correctly is no simple job, so I am simply removing the
power controller validation in BL1 builds.
Change-Id: I56ddf1d799f5fe7f5b0fb2b046f7fe8232b07b27
Signed-off-by: Chris Kay <chris.kay@arm.com>
diff --git a/plat/arm/board/fvp/fvp_topology.c b/plat/arm/board/fvp/fvp_topology.c
index 971e35b..1db0502 100644
--- a/plat/arm/board/fvp/fvp_topology.c
+++ b/plat/arm/board/fvp/fvp_topology.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2023, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -36,7 +36,7 @@
* fconf APIs are not supported for RESET_TO_SP_MIN, RESET_TO_BL31 and
* RESET_TO_BL2 systems.
*/
-#if RESET_TO_SP_MIN || RESET_TO_BL31 || RESET_TO_BL2
+#if RESET_TO_SP_MIN || RESET_TO_BL31 || RESET_TO_BL2 || IMAGE_BL1
cluster_count = FVP_CLUSTER_COUNT;
cpus_per_cluster = FVP_MAX_CPUS_PER_CLUSTER * FVP_MAX_PE_PER_CPU;
#else
@@ -106,8 +106,10 @@
if (thread_id >= FVP_MAX_PE_PER_CPU)
return -1;
+#if !IMAGE_BL1
if (fvp_pwrc_read_psysr(mpidr) == PSYSR_INVALID)
return -1;
+#endif /* IMAGE_BL1 */
/*
* Core position calculation for FVP platform depends on the MT bit in
diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk
index 6b995af..8fa01ff 100644
--- a/plat/arm/board/fvp/platform.mk
+++ b/plat/arm/board/fvp/platform.mk
@@ -237,6 +237,7 @@
plat/arm/board/fvp/fvp_bl1_setup.c \
plat/arm/board/fvp/fvp_err.c \
plat/arm/board/fvp/fvp_io_storage.c \
+ plat/arm/board/fvp/fvp_topology.c \
${FVP_CPU_LIBS} \
${FVP_INTERCONNECT_SOURCES}