fix(intel): update initialization to prevent warnings message
This patch is used to solve TF-A build warning with build option
ENABLE_LTO=1
Change-Id: Id427e9d6f96e21fc132fb5af60e9499e1bbecea3
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c
index f4a3ea0..62fa759 100644
--- a/plat/intel/soc/common/socfpga_sip_svc.c
+++ b/plat/intel/soc/common/socfpga_sip_svc.c
@@ -930,7 +930,7 @@
case ALTERA_SIP_SMC_ASYNC_RESP_POLL:
{
uint32_t ret_args[8] = {0};
- uint32_t ret_args_len;
+ uint32_t ret_args_len = 0;
status = mailbox_response_poll_v3(GET_CLIENT_ID(x1),
GET_JOB_ID(x1),