fix(intel): update initialization to prevent warnings message
This patch is used to solve TF-A build warning with build option
ENABLE_LTO=1
Change-Id: Id427e9d6f96e21fc132fb5af60e9499e1bbecea3
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
diff --git a/plat/intel/soc/agilex/bl31_plat_setup.c b/plat/intel/soc/agilex/bl31_plat_setup.c
index a3c3545..dabe865 100644
--- a/plat/intel/soc/agilex/bl31_plat_setup.c
+++ b/plat/intel/soc/agilex/bl31_plat_setup.c
@@ -67,6 +67,11 @@
mmio_write_64(PLAT_SEC_ENTRY, PLAT_SEC_WARM_ENTRY);
console_16550_register(PLAT_INTEL_UART_BASE, PLAT_UART_CLOCK,
PLAT_BAUDRATE, &console);
+
+ /* Enable TF-A BL31 logs when running from non-secure world also. */
+ console_set_scope(&console,
+ (CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH));
+
/*
* Check params passed from BL31 should not be NULL,
*/
diff --git a/plat/intel/soc/agilex5/soc/agilex5_ddr.c b/plat/intel/soc/agilex5/soc/agilex5_ddr.c
index 0d60324..acf7528 100644
--- a/plat/intel/soc/agilex5/soc/agilex5_ddr.c
+++ b/plat/intel/soc/agilex5/soc/agilex5_ddr.c
@@ -297,7 +297,7 @@
bool full_mem_init = false;
phys_size_t hw_ddr_size;
phys_size_t config_ddr_size;
- struct io96b_info io96b_ctrl;
+ struct io96b_info io96b_ctrl = {0};
enum reset_type reset_t = get_reset_type(mmio_read_32(SOCFPGA_SYSMGR(
BOOT_SCRATCH_COLD_3)));
bool is_dualport = hoff_ptr->ddr_config & BIT(0);
diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c
index f4a3ea0..62fa759 100644
--- a/plat/intel/soc/common/socfpga_sip_svc.c
+++ b/plat/intel/soc/common/socfpga_sip_svc.c
@@ -930,7 +930,7 @@
case ALTERA_SIP_SMC_ASYNC_RESP_POLL:
{
uint32_t ret_args[8] = {0};
- uint32_t ret_args_len;
+ uint32_t ret_args_len = 0;
status = mailbox_response_poll_v3(GET_CLIENT_ID(x1),
GET_JOB_ID(x1),