rcar_gen3: drivers: Change to restore timer counter value at resume
Changed to save and restore cntpct_el0 using memory mapped
register for generic timer when System Suspend and Resume.
Reported by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: I40fd9f5434c4d52b320cd1d20322b9b8e4e67155
diff --git a/drivers/renesas/rcar/pwrc/pwrc.c b/drivers/renesas/rcar/pwrc/pwrc.c
index e223f07..d97e593 100644
--- a/drivers/renesas/rcar/pwrc/pwrc.c
+++ b/drivers/renesas/rcar/pwrc/pwrc.c
@@ -13,6 +13,7 @@
#include <lib/bakery_lock.h>
#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
+#include <plat/common/platform.h>
#include "iic_dvfs.h"
#include "rcar_def.h"
@@ -126,6 +127,14 @@
#define RST_MODEMR (RST_BASE + 0x0060U)
#define RST_MODEMR_BIT0 (0x00000001U)
+#define RCAR_CNTCR_OFF (0x00U)
+#define RCAR_CNTCVL_OFF (0x08U)
+#define RCAR_CNTCVU_OFF (0x0CU)
+#define RCAR_CNTFID_OFF (0x20U)
+
+#define RCAR_CNTCR_EN ((uint32_t)1U << 0U)
+#define RCAR_CNTCR_FCREQ(x) ((uint32_t)(x) << 8U)
+
#if PMIC_ROHM_BD9571
#define BIT_BKUP_CTRL_OUT ((uint8_t)(1U << 4))
#define PMIC_BKUP_MODE_CNT (0x20U)
@@ -323,6 +332,39 @@
rcar_lock_release();
}
+static uint64_t rcar_pwrc_saved_cntpct_el0;
+static uint32_t rcar_pwrc_saved_cntfid;
+
+#if RCAR_SYSTEM_SUSPEND
+static void rcar_pwrc_save_timer_state(void)
+{
+ rcar_pwrc_saved_cntpct_el0 = read_cntpct_el0();
+
+ rcar_pwrc_saved_cntfid =
+ mmio_read_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTFID_OFF));
+}
+#endif
+
+void rcar_pwrc_restore_timer_state(void)
+{
+ /* Stop timer before restoring counter value */
+ mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCR_OFF), 0U);
+
+ mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVL_OFF),
+ (uint32_t)(rcar_pwrc_saved_cntpct_el0 & 0xFFFFFFFFU));
+ mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCVU_OFF),
+ (uint32_t)(rcar_pwrc_saved_cntpct_el0 >> 32U));
+
+ mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTFID_OFF),
+ rcar_pwrc_saved_cntfid);
+
+ /* Start generic timer back */
+ write_cntfrq_el0((u_register_t)plat_get_syscnt_freq2());
+
+ mmio_write_32((uintptr_t)(RCAR_CNTC_BASE + RCAR_CNTCR_OFF),
+ (RCAR_CNTCR_FCREQ(0U) | RCAR_CNTCR_EN));
+}
+
#if !PMIC_ROHM_BD9571
void rcar_pwrc_system_reset(void)
{
@@ -640,7 +682,7 @@
DEVICE_SRAM_STACK_SIZE);
uint32_t sctlr;
- rcar_pwrc_save_generic_timer(rcar_stack_generic_timer);
+ rcar_pwrc_save_timer_state();
/* disable MMU */
sctlr = (uint32_t) read_sctlr_el3();