refactor(ast2700): adopt RESET_TO_BL31 boot flow
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme.
The execution of BL1/2 can be saved from ARM CA35 while most
low level platform initialization are moved to a preceding MCU.
This patch updates the build configuration and also adds
the SMP mailbox setup code to hold secondary cores until
they are being waken up.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Change-Id: I7e0aa6416b92b97036153db1d9a26baaa41b7b18
diff --git a/plat/aspeed/ast2700/plat_bl31_setup.c b/plat/aspeed/ast2700/plat_bl31_setup.c
index 36e7338..fde5dbb 100644
--- a/plat/aspeed/ast2700/plat_bl31_setup.c
+++ b/plat/aspeed/ast2700/plat_bl31_setup.c
@@ -10,6 +10,7 @@
#include <drivers/arm/gicv3.h>
#include <drivers/console.h>
#include <drivers/ti/uart/uart_16550.h>
+#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables_v2.h>
#include <plat/common/platform.h>
#include <platform_def.h>
@@ -55,7 +56,14 @@
console_set_scope(&console, CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_CRASH);
- bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
+ SET_PARAM_HEAD(&bl32_ep_info, PARAM_EP, VERSION_2, 0);
+ bl32_ep_info.pc = BL32_BASE;
+ SET_SECURITY_STATE(bl32_ep_info.h.attr, SECURE);
+
+ SET_PARAM_HEAD(&bl33_ep_info, PARAM_EP, VERSION_2, 0);
+ bl33_ep_info.pc = mmio_read_64(SCU_CPU_SMP_EP0);
+ bl33_ep_info.spsr = SPSR_64(MODE_EL2, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS);
+ SET_SECURITY_STATE(bl33_ep_info.h.attr, NON_SECURE);
}
void bl31_plat_arch_setup(void)