stm32mp1: rename stpmu1 to stpmic1
This is the correct name of the IP.
Rename stm32mp1_pmic files to stm32mp_pmic.
Change-Id: I238a7d1f9a1d099daf7788dc9ebbd3146ba2f15f
Signed-off-by: Yann Gautier <yann.gautier@st.com>
diff --git a/drivers/st/ddr/stm32mp1_ddr.c b/drivers/st/ddr/stm32mp1_ddr.c
index aca0450..e109e87 100644
--- a/drivers/st/ddr/stm32mp1_ddr.c
+++ b/drivers/st/ddr/stm32mp1_ddr.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
@@ -12,10 +12,10 @@
#include <arch_helpers.h>
#include <common/debug.h>
#include <drivers/delay_timer.h>
+#include <drivers/st/stm32mp_pmic.h>
#include <drivers/st/stm32mp1_clk.h>
#include <drivers/st/stm32mp1_ddr.h>
#include <drivers/st/stm32mp1_ddr_regs.h>
-#include <drivers/st/stm32mp1_pmic.h>
#include <drivers/st/stm32mp1_pwr.h>
#include <drivers/st/stm32mp1_ram.h>
#include <drivers/st/stm32mp1_rcc.h>
diff --git a/drivers/st/pmic/stm32mp1_pmic.c b/drivers/st/pmic/stm32mp_pmic.c
similarity index 69%
rename from drivers/st/pmic/stm32mp1_pmic.c
rename to drivers/st/pmic/stm32mp_pmic.c
index c5bdfc0..80b4cab 100644
--- a/drivers/st/pmic/stm32mp1_pmic.c
+++ b/drivers/st/pmic/stm32mp_pmic.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,10 +13,10 @@
#include <common/debug.h>
#include <drivers/delay_timer.h>
+#include <drivers/st/stm32mp_pmic.h>
#include <drivers/st/stm32_gpio.h>
#include <drivers/st/stm32mp1_clk.h>
-#include <drivers/st/stm32mp1_pmic.h>
-#include <drivers/st/stpmu1.h>
+#include <drivers/st/stpmic1.h>
#include <lib/mmio.h>
#include <lib/utils_def.h>
@@ -27,23 +27,23 @@
#define MASK_RESET_BUCK3 BIT(2)
-#define STPMU1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2))
-#define STPMU1_LDO12356_OUTPUT_SHIFT 2
-#define STPMU1_LDO3_MODE (uint8_t)(BIT(7))
-#define STPMU1_LDO3_DDR_SEL 31U
-#define STPMU1_LDO3_1800000 (9U << STPMU1_LDO12356_OUTPUT_SHIFT)
+#define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2))
+#define STPMIC1_LDO12356_OUTPUT_SHIFT 2
+#define STPMIC1_LDO3_MODE (uint8_t)(BIT(7))
+#define STPMIC1_LDO3_DDR_SEL 31U
+#define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT)
-#define STPMU1_BUCK_OUTPUT_SHIFT 2
-#define STPMU1_BUCK3_1V8 (39U << STPMU1_BUCK_OUTPUT_SHIFT)
+#define STPMIC1_BUCK_OUTPUT_SHIFT 2
+#define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT)
-#define STPMU1_DEFAULT_START_UP_DELAY_MS 1
+#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1
static struct i2c_handle_s i2c_handle;
static uint32_t pmic_i2c_addr;
static int dt_get_pmic_node(void *fdt)
{
- return fdt_node_offset_by_compatible(fdt, -1, "st,stpmu1");
+ return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1");
}
bool dt_check_pmic(void)
@@ -138,16 +138,16 @@
voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U);
node_name = fdt_get_name(fdt, regulator_node, NULL);
- if (stpmu1_is_regulator_enabled(node_name) == 0U) {
+ if (stpmic1_is_regulator_enabled(node_name) == 0U) {
int status;
- status = stpmu1_regulator_voltage_set(node_name,
- voltage);
+ status = stpmic1_regulator_voltage_set(node_name,
+ voltage);
if (status != 0) {
return status;
}
- status = stpmu1_regulator_enable(node_name);
+ status = stpmic1_regulator_enable(node_name);
if (status != 0) {
return status;
}
@@ -204,7 +204,7 @@
panic();
}
- stpmu1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr);
+ stpmic1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr);
}
void initialize_pmic(void)
@@ -214,7 +214,7 @@
initialize_pmic_i2c();
- status = stpmu1_register_read(VERSION_STATUS_REG, &read_val);
+ status = stpmic1_register_read(VERSION_STATUS_REG, &read_val);
if (status != 0) {
panic();
}
@@ -222,7 +222,7 @@
INFO("PMIC version = 0x%x\n", read_val);
/* Keep VDD on during the reset cycle */
- status = stpmu1_register_update(MASK_RESET_BUCK_REG,
+ status = stpmic1_register_update(MASK_RESET_BUCK_REG,
MASK_RESET_BUCK3,
MASK_RESET_BUCK3);
if (status != 0) {
@@ -239,45 +239,46 @@
switch (ddr_type) {
case STM32MP_DDR3:
/* Set LDO3 to sync mode */
- status = stpmu1_register_read(LDO3_CONTROL_REG, &read_val);
+ status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
if (status != 0) {
return status;
}
- read_val &= ~STPMU1_LDO3_MODE;
- read_val &= ~STPMU1_LDO12356_OUTPUT_MASK;
- read_val |= STPMU1_LDO3_DDR_SEL << STPMU1_LDO12356_OUTPUT_SHIFT;
+ read_val &= ~STPMIC1_LDO3_MODE;
+ read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
+ read_val |= STPMIC1_LDO3_DDR_SEL <<
+ STPMIC1_LDO12356_OUTPUT_SHIFT;
- status = stpmu1_register_write(LDO3_CONTROL_REG, read_val);
+ status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
if (status != 0) {
return status;
}
- status = stpmu1_regulator_voltage_set("buck2", 1350);
+ status = stpmic1_regulator_voltage_set("buck2", 1350);
if (status != 0) {
return status;
}
- status = stpmu1_regulator_enable("buck2");
+ status = stpmic1_regulator_enable("buck2");
if (status != 0) {
return status;
}
- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
+ mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
- status = stpmu1_regulator_enable("vref_ddr");
+ status = stpmic1_regulator_enable("vref_ddr");
if (status != 0) {
return status;
}
- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
+ mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
- status = stpmu1_regulator_enable("ldo3");
+ status = stpmic1_regulator_enable("ldo3");
if (status != 0) {
return status;
}
- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
+ mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
break;
case STM32MP_LPDDR2:
@@ -286,57 +287,57 @@
* Set LDO3 to bypass mode if BUCK3 = 1.8V
* Set LDO3 to normal mode if BUCK3 != 1.8V
*/
- status = stpmu1_register_read(BUCK3_CONTROL_REG, &read_val);
+ status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val);
if (status != 0) {
return status;
}
- if ((read_val & STPMU1_BUCK3_1V8) == STPMU1_BUCK3_1V8) {
+ if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) {
buck3_at_1v8 = true;
}
- status = stpmu1_register_read(LDO3_CONTROL_REG, &read_val);
+ status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val);
if (status != 0) {
return status;
}
- read_val &= ~STPMU1_LDO3_MODE;
- read_val &= ~STPMU1_LDO12356_OUTPUT_MASK;
- read_val |= STPMU1_LDO3_1800000;
+ read_val &= ~STPMIC1_LDO3_MODE;
+ read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK;
+ read_val |= STPMIC1_LDO3_1800000;
if (buck3_at_1v8) {
- read_val |= STPMU1_LDO3_MODE;
+ read_val |= STPMIC1_LDO3_MODE;
}
- status = stpmu1_register_write(LDO3_CONTROL_REG, read_val);
+ status = stpmic1_register_write(LDO3_CONTROL_REG, read_val);
if (status != 0) {
return status;
}
- status = stpmu1_regulator_voltage_set("buck2", 1200);
+ status = stpmic1_regulator_voltage_set("buck2", 1200);
if (status != 0) {
return status;
}
- status = stpmu1_regulator_enable("ldo3");
+ status = stpmic1_regulator_enable("ldo3");
if (status != 0) {
return status;
}
- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
+ mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
- status = stpmu1_regulator_enable("buck2");
+ status = stpmic1_regulator_enable("buck2");
if (status != 0) {
return status;
}
- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
+ mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
- status = stpmu1_regulator_enable("vref_ddr");
+ status = stpmic1_regulator_enable("vref_ddr");
if (status != 0) {
return status;
}
- mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS);
+ mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS);
break;
default:
diff --git a/drivers/st/pmic/stpmu1.c b/drivers/st/pmic/stpmic1.c
similarity index 75%
rename from drivers/st/pmic/stpmu1.c
rename to drivers/st/pmic/stpmic1.c
index 9c36bf6..8a9eae1 100644
--- a/drivers/st/pmic/stpmu1.c
+++ b/drivers/st/pmic/stpmic1.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016-2018, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,7 +7,7 @@
#include <string.h>
#include <common/debug.h>
-#include <drivers/st/stpmu1.h>
+#include <drivers/st/stpmic1.h>
#include <plat/common/platform.h>
struct regul_struct {
@@ -18,8 +18,8 @@
uint8_t low_power_reg;
};
-static struct i2c_handle_s *stpmu_i2c_handle;
-static uint16_t stpmu_i2c_addr;
+static struct i2c_handle_s *pmic_i2c_handle;
+static uint16_t pmic_i2c_addr;
/* Voltage tables in mV */
static const uint16_t buck1_voltage_table[] = {
@@ -462,9 +462,9 @@
},
};
-#define MAX_REGUL ARRAY_SIZE(regulators_table)
+#define MAX_REGUL ARRAY_SIZE(regulators_table)
-static const struct regul_struct *stpmu1_get_regulator_data(const char *name)
+static const struct regul_struct *get_regulator_data(const char *name)
{
uint8_t i;
@@ -480,10 +480,9 @@
return NULL;
}
-static uint8_t stpmu1_voltage_find_index(const char *name,
- uint16_t millivolts)
+static uint8_t voltage_to_index(const char *name, uint16_t millivolts)
{
- const struct regul_struct *regul = stpmu1_get_regulator_data(name);
+ const struct regul_struct *regul = get_regulator_data(name);
uint8_t i;
for (i = 0 ; i < regul->voltage_table_size ; i++) {
@@ -498,59 +497,59 @@
return 0;
}
-int stpmu1_switch_off(void)
+int stpmic1_switch_off(void)
{
- return stpmu1_register_update(MAIN_CONTROL_REG, 1,
- SOFTWARE_SWITCH_OFF_ENABLED);
+ return stpmic1_register_update(MAIN_CONTROL_REG, 1,
+ SOFTWARE_SWITCH_OFF_ENABLED);
}
-int stpmu1_regulator_enable(const char *name)
+int stpmic1_regulator_enable(const char *name)
{
- const struct regul_struct *regul = stpmu1_get_regulator_data(name);
+ const struct regul_struct *regul = get_regulator_data(name);
- return stpmu1_register_update(regul->control_reg, BIT(0), BIT(0));
+ return stpmic1_register_update(regul->control_reg, BIT(0), BIT(0));
}
-int stpmu1_regulator_disable(const char *name)
+int stpmic1_regulator_disable(const char *name)
{
- const struct regul_struct *regul = stpmu1_get_regulator_data(name);
+ const struct regul_struct *regul = get_regulator_data(name);
- return stpmu1_register_update(regul->control_reg, 0, BIT(0));
+ return stpmic1_register_update(regul->control_reg, 0, BIT(0));
}
-uint8_t stpmu1_is_regulator_enabled(const char *name)
+uint8_t stpmic1_is_regulator_enabled(const char *name)
{
uint8_t val;
- const struct regul_struct *regul = stpmu1_get_regulator_data(name);
+ const struct regul_struct *regul = get_regulator_data(name);
- if (stpmu1_register_read(regul->control_reg, &val) != 0) {
+ if (stpmic1_register_read(regul->control_reg, &val) != 0) {
panic();
}
return (val & 0x1U);
}
-int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts)
+int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts)
{
- uint8_t voltage_index = stpmu1_voltage_find_index(name, millivolts);
- const struct regul_struct *regul = stpmu1_get_regulator_data(name);
+ uint8_t voltage_index = voltage_to_index(name, millivolts);
+ const struct regul_struct *regul = get_regulator_data(name);
- return stpmu1_register_update(regul->control_reg, voltage_index << 2,
- 0xFC);
+ return stpmic1_register_update(regul->control_reg, voltage_index << 2,
+ 0xFC);
}
-int stpmu1_register_read(uint8_t register_id, uint8_t *value)
+int stpmic1_register_read(uint8_t register_id, uint8_t *value)
{
- return stm32_i2c_mem_read(stpmu_i2c_handle, stpmu_i2c_addr,
- (uint16_t)register_id, I2C_MEMADD_SIZE_8BIT,
- value, 1, 100000);
+ return stm32_i2c_mem_read(pmic_i2c_handle, pmic_i2c_addr,
+ (uint16_t)register_id, I2C_MEMADD_SIZE_8BIT,
+ value, 1, 100000);
}
-int stpmu1_register_write(uint8_t register_id, uint8_t value)
+int stpmic1_register_write(uint8_t register_id, uint8_t value)
{
int status;
- status = stm32_i2c_mem_write(stpmu_i2c_handle, stpmu_i2c_addr,
+ status = stm32_i2c_mem_write(pmic_i2c_handle, pmic_i2c_addr,
(uint16_t)register_id,
I2C_MEMADD_SIZE_8BIT, &value, 1, 100000);
@@ -561,7 +560,7 @@
if ((register_id != WATCHDOG_CONTROL_REG) && (register_id <= 0x40U)) {
uint8_t readval;
- status = stpmu1_register_read(register_id, &readval);
+ status = stpmic1_register_read(register_id, &readval);
if (status != 0) {
return status;
}
@@ -574,12 +573,12 @@
return 0;
}
-int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask)
+int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask)
{
int status;
uint8_t val;
- status = stpmu1_register_read(register_id, &val);
+ status = stpmic1_register_read(register_id, &val);
if (status != 0) {
return status;
}
@@ -591,11 +590,11 @@
val |= (value & mask);
/* Send new value on I2C Bus */
- return stpmu1_register_write(register_id, val);
+ return stpmic1_register_write(register_id, val);
}
-void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr)
+void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr)
{
- stpmu_i2c_handle = i2c_handle;
- stpmu_i2c_addr = i2c_addr;
+ pmic_i2c_handle = i2c_handle;
+ pmic_i2c_addr = i2c_addr;
}
diff --git a/fdts/stm32mp157c-ed1.dts b/fdts/stm32mp157c-ed1.dts
index e3dabe8..0c00b13 100644
--- a/fdts/stm32mp157c-ed1.dts
+++ b/fdts/stm32mp157c-ed1.dts
@@ -26,8 +26,8 @@
i2c-scl-falling-time-ns = <20>;
status = "okay";
- pmic: stpmu1@33 {
- compatible = "st,stpmu1";
+ pmic: stpmic@33 {
+ compatible = "st,stpmic1";
reg = <0x33>;
status = "okay";
@@ -36,7 +36,7 @@
st,usb_control_register = <0x30>;
regulators {
- compatible = "st,stpmu1-regulators";
+ compatible = "st,stpmic1-regulators";
v3v3: buck4 {
regulator-name = "v3v3";
diff --git a/include/drivers/st/stm32mp1_pmic.h b/include/drivers/st/stm32mp_pmic.h
similarity index 67%
rename from include/drivers/st/stm32mp1_pmic.h
rename to include/drivers/st/stm32mp_pmic.h
index 75f8e61..700039b 100644
--- a/include/drivers/st/stm32mp1_pmic.h
+++ b/include/drivers/st/stm32mp_pmic.h
@@ -1,11 +1,11 @@
/*
- * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef STM32MP1_PMIC_H
-#define STM32MP1_PMIC_H
+#ifndef STM32MP_PMIC_H
+#define STM32MP_PMIC_H
#include <stdbool.h>
@@ -17,4 +17,4 @@
void initialize_pmic(void);
int pmic_ddr_power_init(enum ddr_type ddr_type);
-#endif /* STM32MP1_PMIC_H */
+#endif /* STM32MP_PMIC_H */
diff --git a/include/drivers/st/stpmu1.h b/include/drivers/st/stpmic1.h
similarity index 85%
rename from include/drivers/st/stpmu1.h
rename to include/drivers/st/stpmic1.h
index e75d9a6..7149cb5 100644
--- a/include/drivers/st/stpmu1.h
+++ b/include/drivers/st/stpmic1.h
@@ -1,11 +1,11 @@
/*
- * Copyright (c) 2016-2018, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-#ifndef STPMU1_H
-#define STPMU1_H
+#ifndef STPMIC1_H
+#define STPMIC1_H
#include <drivers/st/stm32_i2c.h>
#include <lib/utils_def.h>
@@ -127,14 +127,14 @@
#define SWIN_SWOUT_ENABLED BIT(2)
#define USBSW_OTG_SWITCH_ENABLED BIT(1)
-int stpmu1_switch_off(void);
-int stpmu1_register_read(uint8_t register_id, uint8_t *value);
-int stpmu1_register_write(uint8_t register_id, uint8_t value);
-int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask);
-int stpmu1_regulator_enable(const char *name);
-int stpmu1_regulator_disable(const char *name);
-uint8_t stpmu1_is_regulator_enabled(const char *name);
-int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts);
-void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr);
+int stpmic1_switch_off(void);
+int stpmic1_register_read(uint8_t register_id, uint8_t *value);
+int stpmic1_register_write(uint8_t register_id, uint8_t value);
+int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask);
+int stpmic1_regulator_enable(const char *name);
+int stpmic1_regulator_disable(const char *name);
+uint8_t stpmic1_is_regulator_enabled(const char *name);
+int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts);
+void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr);
-#endif /* STPMU1_H */
+#endif /* STPMIC1_H */
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c
index 6af65fd..4a41901 100644
--- a/plat/st/stm32mp1/bl2_plat_setup.c
+++ b/plat/st/stm32mp1/bl2_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -16,8 +16,8 @@
#include <drivers/delay_timer.h>
#include <drivers/generic_delay_timer.h>
#include <drivers/st/stm32_console.h>
+#include <drivers/st/stm32mp_pmic.h>
#include <drivers/st/stm32mp1_clk.h>
-#include <drivers/st/stm32mp1_pmic.h>
#include <drivers/st/stm32mp1_pwr.h>
#include <drivers/st/stm32mp1_ram.h>
#include <drivers/st/stm32mp1_rcc.h>
diff --git a/plat/st/stm32mp1/platform.mk b/plat/st/stm32mp1/platform.mk
index e9a6af2..22c0c8a 100644
--- a/plat/st/stm32mp1/platform.mk
+++ b/plat/st/stm32mp1/platform.mk
@@ -1,5 +1,5 @@
#
-# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
#
# SPDX-License-Identifier: BSD-3-Clause
#
@@ -52,8 +52,8 @@
drivers/st/ddr/stm32mp1_ddr_helpers.c \
drivers/st/gpio/stm32_gpio.c \
drivers/st/i2c/stm32_i2c.c \
- drivers/st/pmic/stm32mp1_pmic.c \
- drivers/st/pmic/stpmu1.c \
+ drivers/st/pmic/stm32mp_pmic.c \
+ drivers/st/pmic/stpmic1.c \
drivers/st/reset/stm32mp1_reset.c \
plat/st/stm32mp1/stm32mp1_context.c \
plat/st/stm32mp1/stm32mp1_dt.c \