blob: 30f1760a0ecdb8a2f670d786245b550dd8e30798 [file] [log] [blame]
/*
* Copyright (c) 2020-2024, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
#define AFF 00
#include "fvp-defs.dtsi"
#undef POST
#define POST \
};
/ {
compatible = "arm,ffa-core-manifest-1.0";
#address-cells = <2>;
#size-cells = <2>;
attribute {
spmc_id = <0x8000>;
maj_ver = <0x1>;
min_ver = <0x2>;
exec_state = <0x0>;
load_address = <0x0 0x6000000>;
entrypoint = <0x0 0x6000000>;
binary_size = <0x80000>;
};
hypervisor {
compatible = "hafnium,hafnium";
vm1 {
is_ffa_partition;
debug_name = "cactus-primary";
load_address = <0x7000000>;
vcpu_count = <8>;
mem_size = <1048576>;
/*
* Platform specific SiP SMC call handled at EL3. Used
* to pend an interrupt for testing purpose.
*/
smc_whitelist = <0x82000100>;
};
vm2 {
is_ffa_partition;
debug_name = "cactus-secondary";
load_address = <0x7100000>;
vcpu_count = <8>;
mem_size = <1048576>;
};
vm3 {
is_ffa_partition;
debug_name = "cactus-tertiary";
load_address = <0x7200000>;
vcpu_count = <1>;
mem_size = <1048576>;
};
vm4 {
is_ffa_partition;
debug_name = "ivy";
load_address = <0x7600000>;
vcpu_count = <1>;
mem_size = <1048576>;
};
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
CPU_0
/*
* SPMC (Hafnium) requires secondary core nodes are declared
* in descending order.
*/
CPU_7
CPU_6
CPU_5
CPU_4
CPU_3
CPU_2
CPU_1
};
memory@0 {
device_type = "memory";
reg = <0x0 0xfd000000 0x0 0x2000000>,
<0x0 0x7000000 0x0 0x1000000>,
<0x0 0xff000000 0x0 0x1000000>;
};
memory@1 {
device_type = "ns-memory";
reg = <0x00008800 0x80000000 0x0 0x7f000000>,
<0x0 0x88000000 0x0 0x10000000>;
};
memory@2 {
device_type = "device-memory";
reg = <0x0 0x1c090000 0x0 0x40000>, /* UART */
<0x0 0x2bfe0000 0x0 0x20000>, /* SMMUv3TestEngine */
<0x0 0x2a490000 0x0 0x20000>, /* SP805 Trusted Watchdog */
<0x0 0x1c130000 0x0 0x10000>; /* Virtio block device */
};
#if MEASURED_BOOT
#include "event_log.dtsi"
#endif
};