cpus: Add casts to all definitions in CPU headers
There are some incorrect casts and some missing casts in the headers.
This patch fixes the ones that were 64-bit or 32-bit wide wrongly and
adds casts where they were missing.
Note that none of the changes of the patch actually changes the values
of the definitions. This patch is just for correctness.
Change-Id: Iad6458021bad521922ce4f91bafff38b116b49eb
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/include/lib/cpus/aarch32/cortex_a9.h b/include/lib/cpus/aarch32/cortex_a9.h
index a9e86ef..1fb0a92 100644
--- a/include/lib/cpus/aarch32/cortex_a9.h
+++ b/include/lib/cpus/aarch32/cortex_a9.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -7,16 +7,18 @@
#ifndef CORTEX_A9_H
#define CORTEX_A9_H
+#include <lib/utils_def.h>
+
/*******************************************************************************
* Cortex-A9 midr with version/revision set to 0
******************************************************************************/
-#define CORTEX_A9_MIDR 0x410FC090
+#define CORTEX_A9_MIDR U(0x410FC090)
/*******************************************************************************
* CPU Auxiliary Control register specific definitions.
******************************************************************************/
-#define CORTEX_A9_ACTLR_SMP_BIT (1 << 6)
-#define CORTEX_A9_ACTLR_FLZW_BIT (1 << 3)
+#define CORTEX_A9_ACTLR_SMP_BIT (U(1) << 6)
+#define CORTEX_A9_ACTLR_FLZW_BIT (U(1) << 3)
/*******************************************************************************
* CPU Power Control Register