blob: 836e9ae4c499b54ffcfc329bfdb28e928cbf0ba3 [file] [log] [blame]
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) STMicroelectronics 2022 - All Rights Reserved
*/
/ {
aliases {
#if !STM32MP_EMMC && !STM32MP_SDMMC
/delete-property/ mmc0;
/delete-property/ mmc1;
#endif
};
soc {
#if !STM32MP_USB_PROGRAMMER
/delete-node/ usb-otg@49000000;
#endif
#if !STM32MP_RAW_NAND
/delete-node/ memory-controller@58002000;
#endif
#if !STM32MP_SPI_NAND && !STM32MP_SPI_NOR
/delete-node/ spi@58003000;
#endif
#if !STM32MP_EMMC && !STM32MP_SDMMC
/delete-node/ mmc@58005000;
/delete-node/ mmc@58007000;
#endif
#if !STM32MP_USB_PROGRAMMER
/delete-node/ usbh-ohci@5800c000;
/delete-node/ usbh-ehci@5800d000;
#endif
#if !STM32MP_USB_PROGRAMMER
/delete-node/ usbphyc@5a006000;
#endif
pinctrl@50002000 {
#if !STM32MP_EMMC && !STM32MP_SDMMC
/delete-node/ sdmmc1-b4-0;
/delete-node/ sdmmc2-b4-0;
#endif
};
};
/*
* UUID's here are UUID RFC 4122 compliant meaning fieds are stored in
* network order (big endian)
*/
st-io_policies {
fip-handles {
compatible = "st,io-fip-handle";
fw_cfg_uuid = "5807e16a-8459-47be-8ed5-648e8dddab0e";
bl32_uuid = "05d0e189-53dc-1347-8d2b-500a4b7a3e38";
bl32_extra1_uuid = "0b70c29b-2a5a-7840-9f65-0a5682738288";
bl32_extra2_uuid = "8ea87bb1-cfa2-3f4d-85fd-e7bba50220d9";
bl33_uuid = "d6d0eea7-fcea-d54b-9782-9934f234b6e4";
hw_cfg_uuid = "08b8f1d9-c9cf-9349-a962-6fbc6b7265cc";
tos_fw_cfg_uuid = "26257c1a-dbc6-7f47-8d96-c4c4b0248021";
#if TRUSTED_BOARD_BOOT
stm32mp_cfg_cert_uuid = "501d8dd2-8bce-49a5-84eb-559a9f2eaeaf";
t_key_cert_uuid = "827ee890-f860-e411-a1b4-777a21b4f94c";
tos_fw_key_cert_uuid = "9477d603-fb60-e411-85dd-b7105b8cee04";
nt_fw_key_cert_uuid = "8ad5832a-fb60-e411-8aaf-df30bbc49859";
tos_fw_content_cert_uuid = "a49f4411-5e63-e411-8728-3f05722af33d";
nt_fw_content_cert_uuid = "8ec4c1f3-5d63-e411-a7a9-87ee40b23fa7";
#endif
};
};
#if TRUSTED_BOARD_BOOT
tb_fw-config {
compatible = "arm,tb_fw";
/* Disable authentication for development */
disable_auth = <0x0>;
/* Use SRAM2 to manage the mbedTLS heap */
mbedtls_heap_addr = <0x0 0x30004000>; /* SRAM2_BASE */
mbedtls_heap_size = <0x2000>; /* SRAM2_SIZE */
};
#include "stm32mp1-cot-descriptors.dtsi"
#endif
};