fix(errata): workaround for Cortex-A510 erratum 2288014
Cortex-A510 erratum 2288014 is a Cat B erratum that applies to revisions
r0p0, r0p1, r0p2, r0p3 and r1p0, and is fixed in r1p1.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2397239
Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I875519ff55be90244cc3d3a7e9f7abad0fc3c2b8
diff --git a/lib/cpus/aarch64/cortex_a510.S b/lib/cpus/aarch64/cortex_a510.S
index 8f741b9..9c49e48 100644
--- a/lib/cpus/aarch64/cortex_a510.S
+++ b/lib/cpus/aarch64/cortex_a510.S
@@ -50,6 +50,36 @@
b cpu_rev_var_ls
endfunc check_errata_1922240
+ /* --------------------------------------------------
+ * Errata Workaround for Cortex-A510 Errata #2288014.
+ * This applies only to revisions r0p0, r0p1, r0p2,
+ * r0p3 and r1p0. (fixed in r1p1)
+ * x0: variant[4:7] and revision[0:3] of current cpu.
+ * Shall clobber: x0, x1, x17
+ * --------------------------------------------------
+ */
+func errata_cortex_a510_2288014_wa
+ /* Check workaround compatibility. */
+ mov x17, x30
+ bl check_errata_2288014
+ cbz x0, 1f
+
+ /* Apply the workaround by setting IMP_CPUACTLR_EL1[18] = 0b1. */
+ mrs x0, CORTEX_A510_CPUACTLR_EL1
+ mov x1, #1
+ bfi x0, x1, #18, #1
+ msr CORTEX_A510_CPUACTLR_EL1, x0
+
+1:
+ ret x17
+endfunc errata_cortex_a510_2288014_wa
+
+func check_errata_2288014
+ /* Applies to r1p0 and below */
+ mov x1, #0x10
+ b cpu_rev_var_ls
+endfunc check_errata_2288014
+
/* ----------------------------------------------------
* HW will do the cache maintenance while powering down
* ----------------------------------------------------
@@ -81,6 +111,7 @@
* checking functions of each errata.
*/
report_errata ERRATA_A510_1922240, cortex_a510, 1922240
+ report_errata ERRATA_A510_2288014, cortex_a510, 2288014
ldp x8, x30, [sp], #16
ret
@@ -103,6 +134,11 @@
bl errata_cortex_a510_1922240_wa
#endif
+#if ERRATA_A510_2288014
+ mov x0, x18
+ bl errata_cortex_a510_2288014_wa
+#endif
+
ret x19
endfunc cortex_a510_reset_func