Merge "fix(cc): code coverage optimization fix" into integration
diff --git a/docs/about/release-information.rst b/docs/about/release-information.rst
index d814104..ab0bc6f 100644
--- a/docs/about/release-information.rst
+++ b/docs/about/release-information.rst
@@ -68,6 +68,8 @@
+-----------------+---------------------------+------------------------------+
| v2.10 | 4th week of Nov '23 | 2nd week of Nov '23 |
+-----------------+---------------------------+------------------------------+
+| v2.11 | 4th week of May '24 | 2nd week of May '24 |
++-----------------+---------------------------+------------------------------+
Removal of Deprecated Interfaces
--------------------------------
diff --git a/docs/components/rmm-el3-comms-spec.rst b/docs/components/rmm-el3-comms-spec.rst
index 5f0b5ab..5fbd7fd 100644
--- a/docs/components/rmm-el3-comms-spec.rst
+++ b/docs/components/rmm-el3-comms-spec.rst
@@ -53,7 +53,7 @@
consistency with the versioning schemes used in other parts of RMM.
This document specifies the 0.2 version of Boot Interface ABI and RMM-EL3
-services specification and the 0.2 version of the Boot Manifest.
+services specification and the 0.3 version of the Boot Manifest.
.. _rmm_el3_boot_interface:
@@ -182,17 +182,20 @@
This Boot Manifest is versioned independently of the Boot Interface, to help
evolve the former independent of the latter.
-The current version for the Boot Manifest is ``v0.2`` and the rules explained
+The current version for the Boot Manifest is ``v0.3`` and the rules explained
in :ref:`rmm_el3_ifc_versioning` apply on this version as well.
-The Boot Manifest v0.2 has the following fields:
+The Boot Manifest v0.3 has the following fields:
- - version : Version of the Manifest (v0.2)
+ - version : Version of the Manifest (v0.3)
- plat_data : Pointer to the platform specific data and not specified by this
document. These data are optional and can be NULL.
- plat_dram : Structure encoding the NS DRAM information on the platform. This
- field is also optional and platform can choose to zero out this structure if
+ field is optional and platform can choose to zero out this structure if
RMM does not need EL3 to send this information during the boot.
+ - plat_console : Structure encoding the list of consoles for RMM use on the
+ platform. This field is optional and platform can choose to not populate
+ the console list if this is not needed by the RMM for this platform.
For the current version of the Boot Manifest, the core manifest contains a pointer
to the platform data. EL3 must ensure that the whole Boot Manifest, including
@@ -533,23 +536,25 @@
RMM-EL3 Boot Manifest structure
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
-The RMM-EL3 Boot Manifest v0.2 structure contains platform boot information passed
-from EL3 to RMM. The size of the Boot Manifest is 40 bytes.
+The RMM-EL3 Boot Manifest v0.3 structure contains platform boot information passed
+from EL3 to RMM. The size of the Boot Manifest is 64 bytes.
The members of the RMM-EL3 Boot Manifest structure are shown in the following
table:
-+-----------+--------+----------------+----------------------------------------+
-| Name | Offset | Type | Description |
-+===========+========+================+========================================+
-| version | 0 | uint32_t | Boot Manifest version |
-+-----------+--------+----------------+----------------------------------------+
-| padding | 4 | uint32_t | Reserved, set to 0 |
-+-----------+--------+----------------+----------------------------------------+
-| plat_data | 8 | uintptr_t | Pointer to Platform Data section |
-+-----------+--------+----------------+----------------------------------------+
-| plat_dram | 16 | ns_dram_info | NS DRAM Layout Info structure |
-+-----------+--------+----------------+----------------------------------------+
++--------------+--------+----------------+----------------------------------------+
+| Name | Offset | Type | Description |
++==============+========+================+========================================+
+| version | 0 | uint32_t | Boot Manifest version |
++--------------+--------+----------------+----------------------------------------+
+| padding | 4 | uint32_t | Reserved, set to 0 |
++--------------+--------+----------------+----------------------------------------+
+| plat_data | 8 | uintptr_t | Pointer to Platform Data section |
++--------------+--------+----------------+----------------------------------------+
+| plat_dram | 16 | ns_dram_info | NS DRAM Layout Info structure |
++--------------+--------+----------------+----------------------------------------+
+| plat_console | 40 | console_list | List of consoles available to RMM |
++--------------+--------+----------------+----------------------------------------+
.. _ns_dram_info_struct:
@@ -587,5 +592,47 @@
| size | 8 | uint64_t | Size of bank in bytes |
+-----------+--------+----------------+----------------------------------------+
+.. _console_list_struct:
+
+Console List structure
+~~~~~~~~~~~~~~~~~~~~~~
+
+Console List structure contains information about the available consoles for RMM.
+The members of this structure are shown in the table below:
+
++--------------+--------+----------------+----------------------------------------+
+| Name | Offset | Type | Description |
++==============+========+================+========================================+
+| num_consoles | 0 | uint64_t | Number of consoles |
++--------------+--------+----------------+----------------------------------------+
+| consoles | 8 | console_info * | Pointer to 'console_info'[] array |
++--------------+--------+----------------+----------------------------------------+
+| checksum | 16 | uint64_t | Checksum |
++--------------+--------+----------------+----------------------------------------+
+
+Checksum is calculated as two's complement sum of 'num_consoles', 'consoles'
+pointer and the consoles array pointed by it.
+
+.. _console_info_struct:
+
+Console Info structure
+~~~~~~~~~~~~~~~~~~~~~~
+
+Console Info structure contains information about each Console available to RMM.
++-----------+--------+---------------+----------------------------------------+
+| Name | Offset | Type | Description |
++===========+========+===============+========================================+
+| base | 0 | uintptr_t | Console Base address |
++-----------+--------+---------------+----------------------------------------+
+| map_pages | 8 | uint64_t | Num of pages to map for console MMIO |
++-----------+--------+---------------+----------------------------------------+
+| name | 16 | char[] | Name of console |
++-----------+--------+---------------+----------------------------------------+
+| clk_in_hz | 24 | uint64_t | UART clock (in hz) for console |
++-----------+--------+---------------+----------------------------------------+
+| baud_rate | 32 | uint64_t | Baud rate |
++-----------+--------+---------------+----------------------------------------+
+| flags | 40 | uint64_t | Additional flags (RES0) |
++-----------+--------+---------------+----------------------------------------+
diff --git a/docs/plat/index.rst b/docs/plat/index.rst
index 35cc27d..f5c1566 100644
--- a/docs/plat/index.rst
+++ b/docs/plat/index.rst
@@ -70,20 +70,12 @@
+----------------+----------------+--------------------+--------------------+
| Platform | Vendor | Deprecated version | Deleted version |
+================+================+====================+====================+
-| sgm775 | Arm | 2.5 | 2.7 |
-+----------------+----------------+--------------------+--------------------+
-| mt6795 | MTK | 2.5 | 2.7 |
-+----------------+----------------+--------------------+--------------------+
| sgi575 | Arm | 2.8 | TBD |
+----------------+----------------+--------------------+--------------------+
| rdn1edge | Arm | 2.8 | TBD |
+----------------+----------------+--------------------+--------------------+
-| tc0 | Arm | 2.8 | 2.10 |
-+----------------+----------------+--------------------+--------------------+
| tc1 | Arm | 2.10 | TBD |
+----------------+----------------+--------------------+--------------------+
-| rde1edge | Arm | 2.9 | 2.11 |
-+----------------+----------------+--------------------+--------------------+
--------------
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index ee86b7e..6c31d9d 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -1435,18 +1435,23 @@
#define HFGWTR_EL2_INIT_VAL ULL(0xC4000000000000)
/*******************************************************************************
- * FEAT_TCR2 - Extended Translation Control Register
+ * FEAT_TCR2 - Extended Translation Control Registers
******************************************************************************/
+#define TCR2_EL1 S3_0_C2_C0_3
#define TCR2_EL2 S3_4_C2_C0_3
/*******************************************************************************
- * Permission indirection and overlay
+ * Permission indirection and overlay Registers
******************************************************************************/
+#define PIRE0_EL1 S3_0_C10_C2_2
#define PIRE0_EL2 S3_4_C10_C2_2
+#define PIR_EL1 S3_0_C10_C2_3
#define PIR_EL2 S3_4_C10_C2_3
+#define POR_EL1 S3_0_C10_C2_4
#define POR_EL2 S3_4_C10_C2_4
#define S2PIR_EL2 S3_4_C10_C2_5
+#define S2POR_EL1 S3_0_C10_C2_5
/*******************************************************************************
* FEAT_GCS - Guarded Control Stack Registers
diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h
index 6356cab..da7b162 100644
--- a/include/arch/aarch64/arch_helpers.h
+++ b/include/arch/aarch64/arch_helpers.h
@@ -284,6 +284,7 @@
DEFINE_SYSREG_RW_FUNCS(elr_el2)
DEFINE_SYSREG_RW_FUNCS(elr_el3)
DEFINE_SYSREG_RW_FUNCS(mdccsr_el0)
+DEFINE_SYSREG_RW_FUNCS(mdccint_el1)
DEFINE_SYSREG_RW_FUNCS(dbgdtrrx_el0)
DEFINE_SYSREG_RW_FUNCS(dbgdtrtx_el0)
DEFINE_SYSREG_RW_FUNCS(sp_el1)
@@ -504,6 +505,7 @@
DEFINE_SYSREG_READ_FUNC(isr_el1)
+DEFINE_SYSREG_RW_FUNCS(mdscr_el1)
DEFINE_SYSREG_RW_FUNCS(mdcr_el2)
DEFINE_SYSREG_RW_FUNCS(mdcr_el3)
DEFINE_SYSREG_RW_FUNCS(hstr_el2)
@@ -576,6 +578,7 @@
DEFINE_RENAME_IDREG_READ_FUNC(id_aa64mmfr2_el1, ID_AA64MMFR2_EL1)
/* Armv8.2 RAS Registers */
+DEFINE_RENAME_SYSREG_RW_FUNCS(disr_el1, DISR_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(vdisr_el2, VDISR_EL2)
DEFINE_RENAME_SYSREG_RW_FUNCS(vsesr_el2, VSESR_EL2)
@@ -634,15 +637,20 @@
DEFINE_RENAME_IDREG_READ_FUNC(id_aa64mmfr3_el1, ID_AA64MMFR3_EL1)
/* FEAT_TCR2 Register */
+DEFINE_RENAME_SYSREG_RW_FUNCS(tcr2_el1, TCR2_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(tcr2_el2, TCR2_EL2)
/* FEAT_SxPIE Registers */
+DEFINE_RENAME_SYSREG_RW_FUNCS(pire0_el1, PIRE0_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(pire0_el2, PIRE0_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(pir_el1, PIR_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(pir_el2, PIR_EL2)
DEFINE_RENAME_SYSREG_RW_FUNCS(s2pir_el2, S2PIR_EL2)
/* FEAT_SxPOE Registers */
+DEFINE_RENAME_SYSREG_RW_FUNCS(por_el1, POR_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(por_el2, POR_EL2)
+DEFINE_RENAME_SYSREG_RW_FUNCS(s2por_el1, S2POR_EL1)
/* FEAT_GCS Registers */
DEFINE_RENAME_SYSREG_RW_FUNCS(gcscr_el2, GCSCR_EL2)
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h
index fbaa008..74790d1 100644
--- a/include/lib/el3_runtime/aarch64/context.h
+++ b/include/lib/el3_runtime/aarch64/context.h
@@ -109,21 +109,25 @@
#define CTX_AFSR1_EL1 U(0x98)
#define CTX_CONTEXTIDR_EL1 U(0xa0)
#define CTX_VBAR_EL1 U(0xa8)
+#define CTX_MDCCINT_EL1 U(0xb0)
+#define CTX_MDSCR_EL1 U(0xb8)
+
+#define CTX_AARCH64_END U(0xc0) /* Align to the next 16 byte boundary */
/*
* If the platform is AArch64-only, there is no need to save and restore these
* AArch32 registers.
*/
#if CTX_INCLUDE_AARCH32_REGS
-#define CTX_SPSR_ABT U(0xb0) /* Align to the next 16 byte boundary */
-#define CTX_SPSR_UND U(0xb8)
-#define CTX_SPSR_IRQ U(0xc0)
-#define CTX_SPSR_FIQ U(0xc8)
-#define CTX_DACR32_EL2 U(0xd0)
-#define CTX_IFSR32_EL2 U(0xd8)
-#define CTX_AARCH32_END U(0xe0) /* Align to the next 16 byte boundary */
+#define CTX_SPSR_ABT (CTX_AARCH64_END + U(0x0))
+#define CTX_SPSR_UND (CTX_AARCH64_END + U(0x8))
+#define CTX_SPSR_IRQ (CTX_AARCH64_END + U(0x10))
+#define CTX_SPSR_FIQ (CTX_AARCH64_END + U(0x18))
+#define CTX_DACR32_EL2 (CTX_AARCH64_END + U(0x20))
+#define CTX_IFSR32_EL2 (CTX_AARCH64_END + U(0x28))
+#define CTX_AARCH32_END (CTX_AARCH64_END + U(0x30)) /* Align to the next 16 byte boundary */
#else
-#define CTX_AARCH32_END U(0xb0) /* Align to the next 16 byte boundary */
+#define CTX_AARCH32_END CTX_AARCH64_END
#endif /* CTX_INCLUDE_AARCH32_REGS */
/*
@@ -146,17 +150,51 @@
#define CTX_TFSR_EL1 (CTX_TIMER_SYSREGS_END + U(0x8))
#define CTX_RGSR_EL1 (CTX_TIMER_SYSREGS_END + U(0x10))
#define CTX_GCR_EL1 (CTX_TIMER_SYSREGS_END + U(0x18))
-
-/* Align to the next 16 byte boundary */
-#define CTX_MTE_REGS_END (CTX_TIMER_SYSREGS_END + U(0x20))
+#define CTX_MTE_REGS_END (CTX_TIMER_SYSREGS_END + U(0x20)) /* Align to the next 16 byte boundary */
#else
#define CTX_MTE_REGS_END CTX_TIMER_SYSREGS_END
#endif /* ENABLE_FEAT_MTE2 */
+#if ENABLE_FEAT_RAS
+#define CTX_DISR_EL1 (CTX_MTE_REGS_END + U(0x0))
+#define CTX_RAS_REGS_END (CTX_MTE_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_RAS_REGS_END CTX_MTE_REGS_END
+#endif /* ENABLE_FEAT_RAS */
+
+#if ENABLE_FEAT_S1PIE
+#define CTX_PIRE0_EL1 (CTX_RAS_REGS_END + U(0x0))
+#define CTX_PIR_EL1 (CTX_RAS_REGS_END + U(0x8))
+#define CTX_S1PIE_REGS_END (CTX_RAS_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_S1PIE_REGS_END CTX_RAS_REGS_END
+#endif /* ENABLE_FEAT_S1PIE */
+
+#if ENABLE_FEAT_S1POE
+#define CTX_POR_EL1 (CTX_S1PIE_REGS_END + U(0x0))
+#define CTX_S1POE_REGS_END (CTX_S1PIE_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_S1POE_REGS_END CTX_S1PIE_REGS_END
+#endif /* ENABLE_FEAT_S1POE */
+
+#if ENABLE_FEAT_S2POE
+#define CTX_S2POR_EL1 (CTX_S1POE_REGS_END + U(0x0))
+#define CTX_S2POE_REGS_END (CTX_S1POE_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_S2POE_REGS_END CTX_S1POE_REGS_END
+#endif /* ENABLE_FEAT_S2POE */
+
+#if ENABLE_FEAT_TCR2
+#define CTX_TCR2_EL1 (CTX_S2POE_REGS_END + U(0x0))
+#define CTX_TCR2_REGS_END (CTX_S2POE_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_TCR2_REGS_END CTX_S2POE_REGS_END
+#endif /* ENABLE_FEAT_TCR2 */
+
/*
* End of system registers.
*/
-#define CTX_EL1_SYSREGS_END CTX_MTE_REGS_END
+#define CTX_EL1_SYSREGS_END CTX_TCR2_REGS_END
/*******************************************************************************
* Constants that allow assembler code to access members of and the 'fp_regs'
diff --git a/include/lib/transfer_list.h b/include/lib/transfer_list.h
index 5ea5a41..bc915a4 100644
--- a/include/lib/transfer_list.h
+++ b/include/lib/transfer_list.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2023, Linaro Limited and Contributors. All rights reserved.
+ * Copyright (c) 2023-2024, Linaro Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -42,6 +42,8 @@
TL_TAG_HOB_LIST = 3,
TL_TAG_ACPI_TABLE_AGGREGATE = 4,
TL_TAG_OPTEE_PAGABLE_PART = 0x100,
+ TL_TAG_DT_SPMC_MANIFEST = 0x101,
+ TL_TAG_EXEC_EP_INFO64 = 0x102,
};
enum transfer_list_ops {
diff --git a/include/plat/arm/board/common/board_css_def.h b/include/plat/arm/board/common/board_css_def.h
index 1963bf0..3bb68ee 100644
--- a/include/plat/arm/board/common/board_css_def.h
+++ b/include/plat/arm/board/common/board_css_def.h
@@ -67,9 +67,6 @@
#define PLAT_ARM_RUN_UART_BASE SOC_CSS_UART1_BASE
#define PLAT_ARM_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
-#define PLAT_ARM_SP_MIN_RUN_UART_BASE SOC_CSS_UART1_BASE
-#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ SOC_CSS_UART1_CLK_IN_HZ
-
#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
diff --git a/include/services/rmm_core_manifest.h b/include/services/rmm_core_manifest.h
index b89de9f..578bc14 100644
--- a/include/services/rmm_core_manifest.h
+++ b/include/services/rmm_core_manifest.h
@@ -14,7 +14,9 @@
#include <lib/cassert.h>
#define RMMD_MANIFEST_VERSION_MAJOR U(0)
-#define RMMD_MANIFEST_VERSION_MINOR U(2)
+#define RMMD_MANIFEST_VERSION_MINOR U(3)
+
+#define RMM_CONSOLE_MAX_NAME_LEN U(8)
/*
* Manifest version encoding:
@@ -60,12 +62,49 @@
CASSERT(offsetof(struct ns_dram_info, checksum) == 16UL,
rmm_manifest_checksum_unaligned);
+/* Console info structure */
+struct console_info {
+ uintptr_t base; /* Console base address */
+ uint64_t map_pages; /* Num of pages to be mapped in RMM for the console MMIO */
+ char name[RMM_CONSOLE_MAX_NAME_LEN]; /* Name of console */
+ uint64_t clk_in_hz; /* UART clock (in HZ) for the console */
+ uint64_t baud_rate; /* Baud rate */
+ uint64_t flags; /* Additional flags RES0 */
+};
+
+CASSERT(offsetof(struct console_info, base) == 0UL,
+ rmm_manifest_console_base_unaligned);
+CASSERT(offsetof(struct console_info, map_pages) == 8UL,
+ rmm_manifest_console_map_pages_unaligned);
+CASSERT(offsetof(struct console_info, name) == 16UL,
+ rmm_manifest_console_name_unaligned);
+CASSERT(offsetof(struct console_info, clk_in_hz) == 24UL,
+ rmm_manifest_console_clk_in_hz_unaligned);
+CASSERT(offsetof(struct console_info, baud_rate) == 32UL,
+ rmm_manifest_console_baud_rate_unaligned);
+CASSERT(offsetof(struct console_info, flags) == 40UL,
+ rmm_manifest_console_flags_unaligned);
+
-/* Boot manifest core structure as per v0.2 */
+struct console_list {
+ uint64_t num_consoles; /* Number of consoles */
+ struct console_info *consoles; /* Pointer to ns_dram_bank[] */
+ uint64_t checksum; /* Checksum of ns_dram_info data */
+};
+
+CASSERT(offsetof(struct console_list, num_consoles) == 0UL,
+ rmm_manifest_num_consoles);
+CASSERT(offsetof(struct console_list, consoles) == 8UL,
+ rmm_manifest_consoles);
+CASSERT(offsetof(struct console_list, checksum) == 16UL,
+ rmm_manifest_console_list_checksum);
+
+/* Boot manifest core structure as per v0.3 */
struct rmm_manifest {
- uint32_t version; /* Manifest version */
- uint32_t padding; /* RES0 */
- uintptr_t plat_data; /* Manifest platform data */
- struct ns_dram_info plat_dram; /* Platform NS DRAM data */
+ uint32_t version; /* Manifest version */
+ uint32_t padding; /* RES0 */
+ uintptr_t plat_data; /* Manifest platform data */
+ struct ns_dram_info plat_dram; /* Platform NS DRAM data (v0.2) */
+ struct console_list plat_console; /* Platform console list (v0.3) */
};
CASSERT(offsetof(struct rmm_manifest, version) == 0UL,
@@ -74,5 +113,7 @@
rmm_manifest_plat_data_unaligned);
CASSERT(offsetof(struct rmm_manifest, plat_dram) == 16UL,
rmm_manifest_plat_dram_unaligned);
+CASSERT(offsetof(struct rmm_manifest, plat_console) == 40UL,
+ rmm_manifest_plat_console_unaligned);
#endif /* RMM_CORE_MANIFEST_H */
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 7a00e47..39f3947 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -1342,8 +1342,8 @@
}
if (is_feat_gcs_supported()) {
- write_el2_ctx_gcs(el2_sysregs_ctx, gcscr_el2, read_gcspr_el2());
- write_el2_ctx_gcs(el2_sysregs_ctx, gcspr_el2, read_gcscr_el2());
+ write_el2_ctx_gcs(el2_sysregs_ctx, gcscr_el2, read_gcscr_el2());
+ write_el2_ctx_gcs(el2_sysregs_ctx, gcspr_el2, read_gcspr_el2());
}
}
@@ -1490,6 +1490,8 @@
write_ctx_reg(ctx, CTX_AFSR1_EL1, read_afsr1_el1());
write_ctx_reg(ctx, CTX_CONTEXTIDR_EL1, read_contextidr_el1());
write_ctx_reg(ctx, CTX_VBAR_EL1, read_vbar_el1());
+ write_ctx_reg(ctx, CTX_MDCCINT_EL1, read_mdccint_el1());
+ write_ctx_reg(ctx, CTX_MDSCR_EL1, read_mdscr_el1());
#if CTX_INCLUDE_AARCH32_REGS
write_ctx_reg(ctx, CTX_SPSR_ABT, read_spsr_abt());
@@ -1515,6 +1517,36 @@
write_ctx_reg(ctx, CTX_GCR_EL1, read_gcr_el1());
#endif /* ENABLE_FEAT_MTE2 */
+#if ENABLE_FEAT_RAS
+ if (is_feat_ras_supported()) {
+ write_ctx_reg(ctx, CTX_DISR_EL1, read_disr_el1());
+ }
+#endif
+
+#if ENABLE_FEAT_S1PIE
+ if (is_feat_s1pie_supported()) {
+ write_ctx_reg(ctx, CTX_PIRE0_EL1, read_pire0_el1());
+ write_ctx_reg(ctx, CTX_PIR_EL1, read_pir_el1());
+ }
+#endif
+
+#if ENABLE_FEAT_S1POE
+ if (is_feat_s1poe_supported()) {
+ write_ctx_reg(ctx, CTX_POR_EL1, read_por_el1());
+ }
+#endif
+
+#if ENABLE_FEAT_S2POE
+ if (is_feat_s2poe_supported()) {
+ write_ctx_reg(ctx, CTX_S2POR_EL1, read_s2por_el1());
+ }
+#endif
+
+#if ENABLE_FEAT_TCR2
+ if (is_feat_tcr2_supported()) {
+ write_ctx_reg(ctx, CTX_TCR2_EL1, read_tcr2_el1());
+ }
+#endif
}
static void el1_sysregs_context_restore(el1_sysregs_t *ctx)
@@ -1545,6 +1577,8 @@
write_afsr1_el1(read_ctx_reg(ctx, CTX_AFSR1_EL1));
write_contextidr_el1(read_ctx_reg(ctx, CTX_CONTEXTIDR_EL1));
write_vbar_el1(read_ctx_reg(ctx, CTX_VBAR_EL1));
+ write_mdccint_el1(read_ctx_reg(ctx, CTX_MDCCINT_EL1));
+ write_mdscr_el1(read_ctx_reg(ctx, CTX_MDSCR_EL1));
#if CTX_INCLUDE_AARCH32_REGS
write_spsr_abt(read_ctx_reg(ctx, CTX_SPSR_ABT));
@@ -1570,6 +1604,36 @@
write_gcr_el1(read_ctx_reg(ctx, CTX_GCR_EL1));
#endif /* ENABLE_FEAT_MTE2 */
+#if ENABLE_FEAT_RAS
+ if (is_feat_ras_supported()) {
+ write_disr_el1(read_ctx_reg(ctx, CTX_DISR_EL1));
+ }
+#endif
+
+#if ENABLE_FEAT_S1PIE
+ if (is_feat_s1pie_supported()) {
+ write_pire0_el1(read_ctx_reg(ctx, CTX_PIRE0_EL1));
+ write_pir_el1(read_ctx_reg(ctx, CTX_PIR_EL1));
+ }
+#endif
+
+#if ENABLE_FEAT_S1POE
+ if (is_feat_s1poe_supported()) {
+ write_por_el1(read_ctx_reg(ctx, CTX_POR_EL1));
+ }
+#endif
+
+#if ENABLE_FEAT_S2POE
+ if (is_feat_s2poe_supported()) {
+ write_s2por_el1(read_ctx_reg(ctx, CTX_S2POR_EL1));
+ }
+#endif
+
+#if ENABLE_FEAT_TCR2
+ if (is_feat_tcr2_supported()) {
+ write_tcr2_el1(read_ctx_reg(ctx, CTX_TCR2_EL1));
+ }
+#endif
}
/*******************************************************************************
diff --git a/lib/romlib/Makefile b/lib/romlib/Makefile
index f11e577..62cbf3e 100644
--- a/lib/romlib/Makefile
+++ b/lib/romlib/Makefile
@@ -30,9 +30,10 @@
Q :=
endif
-LDFLAGS := --gc-sections -O1
+LDFLAGS := -Wl,--gc-sections -nostdlib
+
ifeq ($(DEBUG),1)
- LDFLAGS += -Map=$(MAPFILE)
+ LDFLAGS += -Wl,-Map=$(MAPFILE)
endif
ifeq (${ARM_ARCH_MINOR},0)
diff --git a/make_helpers/toolchain.mk b/make_helpers/toolchain.mk
index 7255509..5293d40 100644
--- a/make_helpers/toolchain.mk
+++ b/make_helpers/toolchain.mk
@@ -222,27 +222,27 @@
#
# Arm Compiler for Embedded
-guess-tool-arm-clang = $(shell $(1) --version 2>&1 | grep -o "Tool: armclang")
-guess-tool-arm-link = $(shell $(1) --help 2>&1 | grep -o "Tool: armlink")
-guess-tool-arm-fromelf = $(shell $(1) --help 2>&1 | grep -o "Tool: fromelf")
-guess-tool-arm-ar = $(shell $(1) --version 2>&1 | grep -o "Tool: armar")
+guess-tool-arm-clang = $(shell $(1) --version 2>&1 <$(nul) | grep -o "Tool: armclang")
+guess-tool-arm-link = $(shell $(1) --help 2>&1 <$(nul) | grep -o "Tool: armlink")
+guess-tool-arm-fromelf = $(shell $(1) --help 2>&1 <$(nul) | grep -o "Tool: fromelf")
+guess-tool-arm-ar = $(shell $(1) --version 2>&1 <$(nul) | grep -o "Tool: armar")
# LLVM Project
-guess-tool-llvm-clang = $(shell $(1) -v 2>&1 | grep -o "clang version")
-guess-tool-llvm-lld = $(shell $(1) --help 2>&1 | grep -o "OVERVIEW: lld")
-guess-tool-llvm-objcopy = $(shell $(1) --help 2>&1 | grep -o "llvm-objcopy tool")
-guess-tool-llvm-objdump = $(shell $(1) --help 2>&1 | grep -o "llvm object file dumper")
-guess-tool-llvm-ar = $(shell $(1) --help 2>&1 | grep -o "LLVM Archiver")
+guess-tool-llvm-clang = $(shell $(1) -v 2>&1 <$(nul) | grep -o "clang version")
+guess-tool-llvm-lld = $(shell $(1) --help 2>&1 <$(nul) | grep -o "OVERVIEW: lld")
+guess-tool-llvm-objcopy = $(shell $(1) --help 2>&1 <$(nul) | grep -o "llvm-objcopy tool")
+guess-tool-llvm-objdump = $(shell $(1) --help 2>&1 <$(nul) | grep -o "llvm object file dumper")
+guess-tool-llvm-ar = $(shell $(1) --help 2>&1 <$(nul) | grep -o "LLVM Archiver")
# GNU Compiler Collection & GNU Binary Utilities
-guess-tool-gnu-gcc = $(shell $(1) -v 2>&1 | grep -o "gcc version")
-guess-tool-gnu-ld = $(shell $(1) -v 2>&1 | grep -o "GNU ld")
-guess-tool-gnu-objcopy = $(shell $(1) --version 2>&1 | grep -o "GNU objcopy")
-guess-tool-gnu-objdump = $(shell $(1) --version 2>&1 | grep -o "GNU objdump")
-guess-tool-gnu-ar = $(shell $(1) --version 2>&1 | grep -o "GNU ar")
+guess-tool-gnu-gcc = $(shell $(1) -v 2>&1 <$(nul) | grep -o "gcc version")
+guess-tool-gnu-ld = $(shell $(1) -v 2>&1 <$(nul) | grep -o "GNU ld")
+guess-tool-gnu-objcopy = $(shell $(1) --version 2>&1 <$(nul) | grep -o "GNU objcopy")
+guess-tool-gnu-objdump = $(shell $(1) --version 2>&1 <$(nul) | grep -o "GNU objdump")
+guess-tool-gnu-ar = $(shell $(1) --version 2>&1 <$(nul) | grep -o "GNU ar")
# Other tools
-guess-tool-dtc = $(shell $(1) --version 2>&1 | grep -o "Version: DTC")
+guess-tool-dtc = $(shell $(1) --version 2>&1 <$(nul) | grep -o "Version: DTC")
guess-tool = $(firstword $(foreach candidate,$(1), \
$(if $(call guess-tool-$(candidate),$(2)),$(candidate))))
@@ -287,10 +287,10 @@
guess-gnu-gcc-cpp = $(1) # Use the C compiler
guess-gnu-gcc-as = $(1) # Use the C compiler
-guess-gnu-gcc-ld = $(if $(filter 1,$(ENABLE_LTO)),$(1),$(shell $(1) --print-prog-name ld.bfd 2>$(nul)))
+guess-gnu-gcc-ld = $(1) # Use the C compiler
guess-gnu-gcc-oc = $(shell $(1) --print-prog-name objcopy 2>$(nul))
guess-gnu-gcc-od = $(shell $(1) --print-prog-name objdump 2>$(nul))
-guess-gnu-gcc-ar = $(patsubst %$(notdir $(1)),%$(subst gcc,gcc-ar,$(notdir $(1))),$(1))
+guess-gnu-gcc-ar = $(call which,$(patsubst %$(notdir $(1)),%$(subst gcc,gcc-ar,$(notdir $(1))),$(1)))
define locate-toolchain-tool-cc
$(eval toolchain := $(1))
diff --git a/make_helpers/toolchains/aarch32.mk b/make_helpers/toolchains/aarch32.mk
index 226bc75..3475c91 100644
--- a/make_helpers/toolchains/aarch32.mk
+++ b/make_helpers/toolchains/aarch32.mk
@@ -7,7 +7,7 @@
aarch32-cc-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
aarch32-cpp-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
aarch32-as-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
-aarch32-ld-default := $(or $(CROSS_COMPILE),arm-none-eabi-)ld.bfd
+aarch32-ld-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc
aarch32-oc-default := $(or $(CROSS_COMPILE),arm-none-eabi-)objcopy
aarch32-od-default := $(or $(CROSS_COMPILE),arm-none-eabi-)objdump
aarch32-ar-default := $(or $(CROSS_COMPILE),arm-none-eabi-)gcc-ar
diff --git a/make_helpers/toolchains/aarch64.mk b/make_helpers/toolchains/aarch64.mk
index 15c5757..d83d918 100644
--- a/make_helpers/toolchains/aarch64.mk
+++ b/make_helpers/toolchains/aarch64.mk
@@ -7,7 +7,7 @@
aarch64-cc-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
aarch64-cpp-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
aarch64-as-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
-aarch64-ld-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)ld.bfd
+aarch64-ld-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc
aarch64-oc-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)objcopy
aarch64-od-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)objdump
aarch64-ar-default := $(or $(CROSS_COMPILE),aarch64-none-elf-)gcc-ar
diff --git a/make_helpers/toolchains/rk3399-m0.mk b/make_helpers/toolchains/rk3399-m0.mk
index c61b6e8..f57d658 100644
--- a/make_helpers/toolchains/rk3399-m0.mk
+++ b/make_helpers/toolchains/rk3399-m0.mk
@@ -7,7 +7,7 @@
rk3399-m0-cc-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
rk3399-m0-cpp-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
rk3399-m0-as-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
-rk3399-m0-ld-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)ld.bfd
+rk3399-m0-ld-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc
rk3399-m0-oc-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)objcopy
rk3399-m0-od-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)objdump
rk3399-m0-ar-default := $(or $(M0_CROSS_COMPILE),arm-none-eabi-)gcc-ar
diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index beae242..8cbf10e 100644
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -5,6 +5,7 @@
*/
#include <assert.h>
+#include <string.h>
#include <common/debug.h>
#include <drivers/arm/cci.h>
@@ -33,6 +34,14 @@
#define FVP_GICV2 1
#define FVP_GICV3 2
+/* Defines for RMM Console*/
+#define FVP_RMM_CONSOLE_BASE UL(0x1c0c0000)
+#define FVP_RMM_CONSOLE_BAUD UL(115200)
+#define FVP_RMM_CONSOLE_CLK_IN_HZ UL(14745600)
+#define FVP_RMM_CONSOLE_NAME "pl011"
+
+#define FVP_RMM_CONSOLE_COUNT UL(1)
+
/*******************************************************************************
* arm_config holds the characteristics of the differences between the three FVP
* platforms (Base, A53_A57 & Foundation). It will be populated during cold boot
@@ -552,8 +561,9 @@
int plat_rmmd_load_manifest(struct rmm_manifest *manifest)
{
- uint64_t checksum, num_banks;
+ uint64_t checksum, num_banks, num_consoles;
struct ns_dram_bank *bank_ptr;
+ struct console_info *console_ptr;
assert(manifest != NULL);
@@ -561,43 +571,74 @@
num_banks = FCONF_GET_PROPERTY(hw_config, dram_layout, num_banks);
assert(num_banks <= ARM_DRAM_NUM_BANKS);
+ /* Set number of consoles */
+ num_consoles = FVP_RMM_CONSOLE_COUNT;
+
manifest->version = RMMD_MANIFEST_VERSION;
manifest->padding = 0U; /* RES0 */
manifest->plat_data = (uintptr_t)NULL;
manifest->plat_dram.num_banks = num_banks;
+ manifest->plat_console.num_consoles = num_consoles;
/*
- * Array ns_dram_banks[] follows ns_dram_info structure:
+ * Boot Manifest structure illustration, with two dram banks and
+ * a single console.
*
- * +-----------------------------------+
- * | offset | field | comment |
- * +----------+-----------+------------+
- * | 0 | version | 0x00000002 |
- * +----------+-----------+------------+
- * | 4 | padding | 0x00000000 |
- * +----------+-----------+------------+
- * | 8 | plat_data | NULL |
- * +----------+-----------+------------+
- * | 16 | num_banks | |
- * +----------+-----------+ |
- * | 24 | banks | plat_dram |
- * +----------+-----------+ |
- * | 32 | checksum | |
- * +----------+-----------+------------+
- * | 40 | base 0 | |
- * +----------+-----------+ bank[0] |
- * | 48 | size 0 | |
- * +----------+-----------+------------+
- * | 56 | base 1 | |
- * +----------+-----------+ bank[1] |
- * | 64 | size 1 | |
- * +----------+-----------+------------+
+ * +----------------------------------------+
+ * | offset | field | comment |
+ * +--------+----------------+--------------+
+ * | 0 | version | 0x00000003 |
+ * +--------+----------------+--------------+
+ * | 4 | padding | 0x00000000 |
+ * +--------+----------------+--------------+
+ * | 8 | plat_data | NULL |
+ * +--------+----------------+--------------+
+ * | 16 | num_banks | |
+ * +--------+----------------+ |
+ * | 24 | banks | plat_dram |
+ * +--------+----------------+ |
+ * | 32 | checksum | |
+ * +--------+----------------+--------------+
+ * | 40 | num_consoles | |
+ * +--------+----------------+ |
+ * | 48 | consoles | plat_console |
+ * +--------+----------------+ |
+ * | 56 | checksum | |
+ * +--------+----------------+--------------+
+ * | 64 | base 0 | |
+ * +--------+----------------+ bank[0] |
+ * | 72 | size 0 | |
+ * +--------+----------------+--------------+
+ * | 80 | base 1 | |
+ * +--------+----------------+ bank[1] |
+ * | 88 | size 1 | |
+ * +--------+----------------+--------------+
+ * | 96 | base | |
+ * +--------+----------------+ |
+ * | 104 | map_pages | |
+ * +--------+----------------+ |
+ * | 112 | name | |
+ * +--------+----------------+ consoles[0] |
+ * | 120 | clk_in_hz | |
+ * +--------+----------------+ |
+ * | 128 | baud_rate | |
+ * +--------+----------------+ |
+ * | 136 | flags | |
+ * +--------+----------------+--------------+
*/
+
bank_ptr = (struct ns_dram_bank *)
- ((uintptr_t)&manifest->plat_dram.checksum +
- sizeof(manifest->plat_dram.checksum));
+ (((uintptr_t)manifest) + sizeof(*manifest));
+ console_ptr = (struct console_info *)
+ ((uintptr_t)bank_ptr + (num_banks * sizeof(*bank_ptr)));
manifest->plat_dram.banks = bank_ptr;
+ manifest->plat_console.consoles = console_ptr;
+
+ /* Ensure the manifest is not larger than the shared buffer */
+ assert((sizeof(struct rmm_manifest) +
+ (sizeof(struct console_info) * manifest->plat_console.num_consoles) +
+ (sizeof(struct ns_dram_bank) * manifest->plat_dram.num_banks)) <= ARM_EL3_RMM_SHARED_SIZE);
/* Calculate checksum of plat_dram structure */
checksum = num_banks + (uint64_t)bank_ptr;
@@ -617,6 +658,26 @@
/* Checksum must be 0 */
manifest->plat_dram.checksum = ~checksum + 1UL;
+ /* Calculate the checksum of the plat_consoles structure */
+ checksum = num_consoles + (uint64_t)console_ptr;
+
+ /* Zero out the console info struct */
+ memset((void *)console_ptr, '\0', sizeof(struct console_info) * num_consoles);
+
+ console_ptr[0].map_pages = 1;
+ console_ptr[0].base = FVP_RMM_CONSOLE_BASE;
+ console_ptr[0].clk_in_hz = FVP_RMM_CONSOLE_CLK_IN_HZ;
+ console_ptr[0].baud_rate = FVP_RMM_CONSOLE_BAUD;
+
+ strlcpy(console_ptr[0].name, FVP_RMM_CONSOLE_NAME, RMM_CONSOLE_MAX_NAME_LEN-1UL);
+
+ /* Update checksum */
+ checksum += console_ptr[0].base + console_ptr[0].map_pages +
+ console_ptr[0].clk_in_hz + console_ptr[0].baud_rate;
+
+ /* Checksum must be 0 */
+ manifest->plat_console.checksum = ~checksum + 1UL;
+
return 0;
}
#endif /* ENABLE_RME */
diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h
index 82f1e7f..eb878ed 100644
--- a/plat/arm/board/n1sdp/include/platform_def.h
+++ b/plat/arm/board/n1sdp/include/platform_def.h
@@ -19,9 +19,6 @@
#define PLAT_ARM_RUN_UART_BASE 0x1C090000
#define PLAT_ARM_RUN_UART_CLK_IN_HZ 24000000
-#define PLAT_ARM_SP_MIN_RUN_UART_BASE 0x2A410000
-#define PLAT_ARM_SP_MIN_RUN_UART_CLK_IN_HZ 50000000
-
#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
#define PLAT_ARM_CRASH_UART_CLK_IN_HZ PLAT_ARM_RUN_UART_CLK_IN_HZ
diff --git a/plat/arm/board/tc/include/platform_def.h b/plat/arm/board/tc/include/platform_def.h
index f7a4807..cb8ecb0 100644
--- a/plat/arm/board/tc/include/platform_def.h
+++ b/plat/arm/board/tc/include/platform_def.h
@@ -391,8 +391,6 @@
*/
#undef PLAT_ARM_BOOT_UART_BASE
#undef PLAT_ARM_RUN_UART_BASE
-#undef PLAT_ARM_SP_MIN_RUN_UART_BASE
-#define PLAT_ARM_SP_MIN_RUN_UART_BASE PLAT_ARM_RUN_UART_BASE
#undef PLAT_ARM_CRASH_UART_BASE
#undef PLAT_ARM_BOOT_UART_CLK_IN_HZ
@@ -413,7 +411,6 @@
#endif /* TARGET_FLAVOUR_FPGA */
#define PLAT_ARM_RUN_UART_BASE TC_UART0
-#define PLAT_ARM_SP_MIN_RUN_UART_BASE PLAT_ARM_RUN_UART_BASE
#define PLAT_ARM_CRASH_UART_BASE PLAT_ARM_RUN_UART_BASE
#define PLAT_ARM_BOOT_UART_CLK_IN_HZ TC_UARTCLK
diff --git a/services/std_svc/rmmd/rmmd_main.c b/services/std_svc/rmmd/rmmd_main.c
index b3b2a69..033e868 100644
--- a/services/std_svc/rmmd/rmmd_main.c
+++ b/services/std_svc/rmmd/rmmd_main.c
@@ -232,8 +232,10 @@
assert((shared_buf_size == SZ_4K) &&
((void *)shared_buf_base != NULL));
- /* Load the boot manifest at the beginning of the shared area */
+ /* Zero out and load the boot manifest at the beginning of the share area */
manifest = (struct rmm_manifest *)shared_buf_base;
+ (void)memset((void *)manifest, 0, sizeof(struct rmm_manifest));
+
rc = plat_rmmd_load_manifest(manifest);
if (rc != 0) {
ERROR("Error loading RMM Boot Manifest (%i)\n", rc);
diff --git a/services/std_svc/spmd/spmd_logical_sp.c b/services/std_svc/spmd/spmd_logical_sp.c
index d992187..64d506e 100644
--- a/services/std_svc/spmd/spmd_logical_sp.c
+++ b/services/std_svc/spmd/spmd_logical_sp.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2023, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -528,9 +528,10 @@
}
/* Save the non-secure context before entering SPMC */
- cm_el1_sysregs_context_save(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_save(NON_SECURE);
+#else
+ cm_el1_sysregs_context_save(NON_SECURE);
#endif
spmd_build_ffa_info_get_regs(ctx, target_uuid, start_index, tag);
@@ -548,9 +549,10 @@
assert(is_ffa_error(retval) || is_ffa_success(retval));
- cm_el1_sysregs_context_restore(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_restore(NON_SECURE);
+#else
+ cm_el1_sysregs_context_restore(NON_SECURE);
#endif
cm_set_next_eret_context(NON_SECURE);
return true;
@@ -667,9 +669,10 @@
}
/* Save the non-secure context before entering SPMC */
- cm_el1_sysregs_context_save(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_save(NON_SECURE);
+#else
+ cm_el1_sysregs_context_save(NON_SECURE);
#endif
/*
@@ -707,9 +710,10 @@
ffa_endpoint_destination(x1)));
}
- cm_el1_sysregs_context_restore(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_restore(NON_SECURE);
+#else
+ cm_el1_sysregs_context_restore(NON_SECURE);
#endif
cm_set_next_eret_context(NON_SECURE);
diff --git a/services/std_svc/spmd/spmd_main.c b/services/std_svc/spmd/spmd_main.c
index 7572adf..0715b13 100644
--- a/services/std_svc/spmd/spmd_main.c
+++ b/services/std_svc/spmd/spmd_main.c
@@ -227,9 +227,10 @@
assert(handle == cm_get_context(NON_SECURE));
/* Save the non-secure context before entering SPMC */
- cm_el1_sysregs_context_save(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_save(NON_SECURE);
+#else
+ cm_el1_sysregs_context_save(NON_SECURE);
#endif
/* Convey the event to the SPMC through the FFA_INTERRUPT interface. */
@@ -252,9 +253,10 @@
ctx->secure_interrupt_ongoing = false;
- cm_el1_sysregs_context_restore(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_restore(NON_SECURE);
+#else
+ cm_el1_sysregs_context_restore(NON_SECURE);
#endif
cm_set_next_eret_context(NON_SECURE);
@@ -593,14 +595,17 @@
*/
#if (EL3_EXCEPTION_HANDLING == 0)
/*
- * Register an interrupt handler routing Group0 interrupts to SPMD
- * while the NWd is running.
+ * If EL3 interrupts are supported by the platform, register an
+ * interrupt handler routing Group0 interrupts to SPMD while the NWd is
+ * running.
*/
- rc = register_interrupt_type_handler(INTR_TYPE_EL3,
- spmd_group0_interrupt_handler_nwd,
- flags);
- if (rc != 0) {
- panic();
+ if (plat_ic_has_interrupt_type(INTR_TYPE_EL3)) {
+ rc = register_interrupt_type_handler(INTR_TYPE_EL3,
+ spmd_group0_interrupt_handler_nwd,
+ flags);
+ if (rc != 0) {
+ panic();
+ }
}
#endif
@@ -685,9 +690,6 @@
/* Save incoming security state */
#if SPMD_SPM_AT_SEL2
- if (secure_state_in == NON_SECURE) {
- cm_el1_sysregs_context_save(secure_state_in);
- }
cm_el2_sysregs_context_save(secure_state_in);
#else
cm_el1_sysregs_context_save(secure_state_in);
@@ -695,9 +697,6 @@
/* Restore outgoing security state */
#if SPMD_SPM_AT_SEL2
- if (secure_state_out == NON_SECURE) {
- cm_el1_sysregs_context_restore(secure_state_out);
- }
cm_el2_sysregs_context_restore(secure_state_out);
#else
cm_el1_sysregs_context_restore(secure_state_out);
@@ -948,9 +947,10 @@
break;
}
/* Save non-secure system registers context */
- cm_el1_sysregs_context_save(NON_SECURE);
#if SPMD_SPM_AT_SEL2
cm_el2_sysregs_context_save(NON_SECURE);
+#else
+ cm_el1_sysregs_context_save(NON_SECURE);
#endif
/*
diff --git a/tools/renesas/rcar_layout_create/makefile b/tools/renesas/rcar_layout_create/makefile
index baa6e7e..919c1de 100644
--- a/tools/renesas/rcar_layout_create/makefile
+++ b/tools/renesas/rcar_layout_create/makefile
@@ -89,19 +89,19 @@
# Linker
###################################################
$(OUTPUT_FILE_SA0) : $(MEMORY_DEF_SA0) $(OBJ_FILE_SA0)
- $(aarch64-ld) $(OBJ_FILE_SA0) \
+ $(aarch64-ld) $(OBJ_FILE_SA0) -nostdlib \
-T $(MEMORY_DEF_SA0) \
-o $(OUTPUT_FILE_SA0) \
- -Map $(FILE_NAME_SA0).map \
+ -Wl,-Map $(FILE_NAME_SA0).map \
$(aarch64-oc) -O srec --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA0) $(FILE_NAME_SA0).srec
$(aarch64-oc) -O binary --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA0) $(FILE_NAME_SA0).bin
$(OUTPUT_FILE_SA6) : $(MEMORY_DEF_SA6) $(OBJ_FILE_SA6)
- $(aarch64-ld) $(OBJ_FILE_SA6) \
+ $(aarch64-ld) $(OBJ_FILE_SA6) -nostdlib \
-T $(MEMORY_DEF_SA6) \
-o $(OUTPUT_FILE_SA6) \
- -Map $(FILE_NAME_SA6).map \
+ -Wl,-Map $(FILE_NAME_SA6).map \
$(aarch64-oc) -O srec --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA6) $(FILE_NAME_SA6).srec
$(aarch64-oc) -O binary --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA6) $(FILE_NAME_SA6).bin
diff --git a/tools/renesas/rzg_layout_create/makefile b/tools/renesas/rzg_layout_create/makefile
index 4cab5fb..e1c242d 100644
--- a/tools/renesas/rzg_layout_create/makefile
+++ b/tools/renesas/rzg_layout_create/makefile
@@ -86,19 +86,19 @@
# Linker
###################################################
$(OUTPUT_FILE_SA0) : $(MEMORY_DEF_SA0) $(OBJ_FILE_SA0)
- $(aarch64-ld) $(OBJ_FILE_SA0) \
+ $(aarch64-ld) $(OBJ_FILE_SA0) -nostdlib \
-T $(MEMORY_DEF_SA0) \
-o $(OUTPUT_FILE_SA0) \
- -Map $(FILE_NAME_SA0).map \
+ -Wl,-Map $(FILE_NAME_SA0).map \
$(aarch64-oc) -O srec --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA0) $(FILE_NAME_SA0).srec
$(aarch64-oc) -O binary --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA0) $(FILE_NAME_SA0).bin
$(OUTPUT_FILE_SA6) : $(MEMORY_DEF_SA6) $(OBJ_FILE_SA6)
- $(aarch64-ld) $(OBJ_FILE_SA6) \
+ $(aarch64-ld) $(OBJ_FILE_SA6) -nostdlib \
-T $(MEMORY_DEF_SA6) \
-o $(OUTPUT_FILE_SA6) \
- -Map $(FILE_NAME_SA6).map \
+ -Wl,-Map $(FILE_NAME_SA6).map \
$(aarch64-oc) -O srec --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA6) $(FILE_NAME_SA6).srec
$(aarch64-oc) -O binary --adjust-vma=$(RCAR_VMA_ADJUST_ADDR) --srec-forceS3 $(OUTPUT_FILE_SA6) $(FILE_NAME_SA6).bin