| /* |
| * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * |
| * Redistributions of source code must retain the above copyright notice, this |
| * list of conditions and the following disclaimer. |
| * |
| * Redistributions in binary form must reproduce the above copyright notice, |
| * this list of conditions and the following disclaimer in the documentation |
| * and/or other materials provided with the distribution. |
| * |
| * Neither the name of ARM nor the names of its contributors may be used |
| * to endorse or promote products derived from this software without specific |
| * prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| * POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| #include <asm_macros.S> |
| #include <gicv2.h> |
| #include <platform_def.h> |
| |
| .globl plat_secondary_cold_boot_setup |
| .globl plat_is_my_cpu_primary |
| |
| /* ----------------------------------------------------- |
| * void plat_secondary_cold_boot_setup (void); |
| * |
| * This function performs any platform specific actions |
| * needed for a secondary cpu after a cold reset e.g |
| * mark the cpu's presence, mechanism to place it in a |
| * holding pen etc. |
| * TODO: Should we read the PSYS register to make sure |
| * that the request has gone through. |
| * ----------------------------------------------------- |
| */ |
| func plat_secondary_cold_boot_setup |
| mrs x0, mpidr_el1 |
| |
| /* Deactivate the gic cpu interface */ |
| ldr x1, =BASE_GICC_BASE |
| mov w0, #(IRQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP1) |
| orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0) |
| str w0, [x1, #GICC_CTLR] |
| |
| /* |
| * There is no sane reason to come out of this wfi. This |
| * cpu will be powered on and reset by the cpu_on pm api |
| */ |
| dsb sy |
| 1: |
| bl plat_panic_handler |
| endfunc plat_secondary_cold_boot_setup |
| |
| func plat_is_my_cpu_primary |
| mov x9, x30 |
| bl plat_my_core_pos |
| cmp x0, #ZYNQMP_PRIMARY_CPU |
| cset x0, eq |
| ret x9 |
| endfunc plat_is_my_cpu_primary |