| commit | 2be03c06e08df475673ace8137ea2a630f52d7a3 | [log] [tgz] |
|---|---|---|
| author | Elyes Haouas <ehaouas@noos.fr> | Mon Feb 13 09:14:48 2023 +0100 |
| committer | Manish Pandey <manish.pandey2@arm.com> | Tue May 09 15:57:12 2023 +0100 |
| tree | 5085dd0af7deed3a5a52dbcd82a78aa5cd96e888 | |
| parent | 64b7cdcb4c2689a0907c7a063ca2d1369399290d [diff] [blame] |
fix(tree): correct some typos found using codespell (https://github.com/codespell-project/codespell). Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: I1bfa797e3460adddeefa916bb68e22beddaf6373
diff --git a/plat/imx/imx8m/imx8mq/gpc.c b/plat/imx/imx8m/imx8mq/gpc.c index 0a029d6..ebf92f7 100644 --- a/plat/imx/imx8m/imx8mq/gpc.c +++ b/plat/imx/imx8m/imx8mq/gpc.c
@@ -417,7 +417,7 @@ /* set all mix/PU in A53 domain */ mmio_write_32(IMX_GPC_BASE + PGC_CPU_0_1_MAPPING, 0xfffd); - /* set SCU timming */ + /* set SCU timing */ mmio_write_32(IMX_GPC_BASE + PGC_SCU_TIMING, (0x59 << 10) | 0x5B | (0x2 << 20));