blob: 1f4ae6eba576ec859b9d0a9a340c345fd5e50353 [file] [log] [blame]
/*
* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <arch.h>
#include <mcucfg.h>
#include <mmio.h>
void disable_scu(unsigned long mpidr)
{
if (mpidr & MPIDR_CLUSTER_MASK)
mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg,
MP1_ACINACTM);
else
mmio_setbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config,
MP0_ACINACTM);
}
void enable_scu(unsigned long mpidr)
{
if (mpidr & MPIDR_CLUSTER_MASK)
mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp1_miscdbg,
MP1_ACINACTM);
else
mmio_clrbits_32((uintptr_t)&mt6795_mcucfg->mp0_axi_config,
MP0_ACINACTM);
}