| /* |
| * Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * |
| * Redistributions of source code must retain the above copyright notice, this |
| * list of conditions and the following disclaimer. |
| * |
| * Redistributions in binary form must reproduce the above copyright notice, |
| * this list of conditions and the following disclaimer in the documentation |
| * and/or other materials provided with the distribution. |
| * |
| * Neither the name of ARM nor the names of its contributors may be used |
| * to endorse or promote products derived from this software without specific |
| * prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| * POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| #include <arch.h> |
| #include <el3_common_macros.S> |
| |
| .globl bl1_entrypoint |
| |
| |
| /* ----------------------------------------------------- |
| * bl1_entrypoint() is the entry point into the trusted |
| * firmware code when a cpu is released from warm or |
| * cold reset. |
| * ----------------------------------------------------- |
| */ |
| |
| func bl1_entrypoint |
| /* --------------------------------------------------------------------- |
| * If the reset address is programmable then bl1_entrypoint() is |
| * executed only on the cold boot path. Therefore, we can skip the warm |
| * boot mailbox mechanism. |
| * --------------------------------------------------------------------- |
| */ |
| el3_entrypoint_common \ |
| _set_endian=1 \ |
| _warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \ |
| _secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \ |
| _init_memory=1 \ |
| _init_c_runtime=1 \ |
| _exception_vectors=bl1_exceptions |
| |
| /* --------------------------------------------- |
| * Architectural init. can be generic e.g. |
| * enabling stack alignment and platform spec- |
| * ific e.g. MMU & page table setup as per the |
| * platform memory map. Perform the latter here |
| * and the former in bl1_main. |
| * --------------------------------------------- |
| */ |
| bl bl1_early_platform_setup |
| bl bl1_plat_arch_setup |
| |
| /* -------------------------------------------------- |
| * Initialize platform and jump to our c-entry point |
| * for this type of reset. Panic if it returns |
| * -------------------------------------------------- |
| */ |
| bl bl1_main |
| panic: |
| b panic |
| endfunc bl1_entrypoint |