commit 0de6e53b9270e01ec69b52a31e4a1d045dec893f
author Pritesh Raithatha <praithatha@nvidia.com> Tue Jan 24 13:49:46 2017 +0530
committer Varun Wadekar <vwadekar@nvidia.com> Thu Apr 13 12:35:14 2017 -0700
tree 40e702d54955b685b900f1e0ea8ae401fe677968
parent c88654f16236b5b0e4d7ea7b1b9bf75fe3f08502

Tegra: smmu: support for multiple devices

This patch adds flexibility to the code to initialise multiple SMMU
devices. The base address macro name has been changed to make it
explicit that we support multiple SMMUs.

Change-Id: Id4854fb010ebeb699512d79c769de24050c2ad69
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

plat/nvidia/tegra/include/t186/tegra_def.h

diff --git a/plat/nvidia/tegra/include/t186/tegra_def.h b/plat/nvidia/tegra/include/t186/tegra_def.h
index 8a1dd3f..ae11d28 100644
--- a/plat/nvidia/tegra/include/t186/tegra_def.h
+++ b/plat/nvidia/tegra/include/t186/tegra_def.h
@@ -272,7 +272,7 @@
 /*******************************************************************************
  * Tegra SMMU Controller constants
  ******************************************************************************/
-#define TEGRA_SMMU_BASE			0x12000000
+#define TEGRA_SMMU0_BASE		0x12000000
 
 /*******************************************************************************
  * Tegra TZRAM constants