blob: a614267db5396d7ae93ac1a837f77845eace0e8f [file] [log] [blame]
/*
* Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <errno.h>
#include <platform_def.h>
#include <common/debug.h>
#include <drivers/st/bsec.h>
#include <drivers/st/stm32mp1_rcc.h>
#include <lib/mmio.h>
#include <lib/utils_def.h>
#include <stm32mp1_dbgmcu.h>
#define DBGMCU_APB4FZ1 U(0x2C)
#define DBGMCU_APB4FZ1_IWDG2 BIT(2)
static uintptr_t get_rcc_base(void)
{
/* This is called before stm32mp_rcc_base() is available */
return RCC_BASE;
}
static int stm32mp1_dbgmcu_init(void)
{
uint32_t dbg_conf;
uintptr_t rcc_base = get_rcc_base();
dbg_conf = bsec_read_debug_conf();
if ((dbg_conf & BSEC_DBGSWGEN) == 0U) {
uint32_t result = bsec_write_debug_conf(dbg_conf |
BSEC_DBGSWGEN);
if (result != BSEC_OK) {
ERROR("Error enabling DBGSWGEN\n");
return -1;
}
}
mmio_setbits_32(rcc_base + RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
return 0;
}
int stm32mp1_dbgmcu_freeze_iwdg2(void)
{
uint32_t dbg_conf;
if (stm32mp1_dbgmcu_init() != 0) {
return -EPERM;
}
dbg_conf = bsec_read_debug_conf();
if ((dbg_conf & (BSEC_SPIDEN | BSEC_SPINDEN)) != 0U) {
mmio_setbits_32(DBGMCU_BASE + DBGMCU_APB4FZ1,
DBGMCU_APB4FZ1_IWDG2);
}
return 0;
}