blob: 0f2ca39670cb6be7882c2feb85c4333a4d26b319 [file] [log] [blame]
developer4721e252022-06-21 16:41:28 +08001From c2e0f6df51b9b2e681285523b1c4471c7f613c83 Mon Sep 17 00:00:00 2001
developere2cc0fa2022-03-29 17:31:03 +08002From: Bo Jiao <Bo.Jiao@mediatek.com>
developerbd398d52022-06-06 20:53:24 +08003Date: Mon, 6 Jun 2022 20:13:02 +0800
developerf64861f2022-06-22 11:44:53 +08004Subject: [PATCH 1002/1008] mt76: mt7915: csi: implement csi support
developere2cc0fa2022-03-29 17:31:03 +08005
6---
developer4721e252022-06-21 16:41:28 +08007 mt76_connac_mcu.h | 2 +
8 mt7915/Makefile | 4 +-
9 mt7915/init.c | 39 ++++
10 mt7915/mcu.c | 111 ++++++++++++
11 mt7915/mcu.h | 76 ++++++++
12 mt7915/mt7915.h | 20 ++
13 mt7915/vendor.c | 452 ++++++++++++++++++++++++++++++++++++++++++++++
14 mt7915/vendor.h | 60 ++++++
developere2cc0fa2022-03-29 17:31:03 +080015 8 files changed, 762 insertions(+), 2 deletions(-)
developer4721e252022-06-21 16:41:28 +080016 mode change 100755 => 100644 mt7915/mcu.c
17 create mode 100644 mt7915/vendor.c
18 create mode 100644 mt7915/vendor.h
developere2cc0fa2022-03-29 17:31:03 +080019
20diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h
developer4721e252022-06-21 16:41:28 +080021index 333d3a0..b25807a 100644
developere2cc0fa2022-03-29 17:31:03 +080022--- a/mt76_connac_mcu.h
23+++ b/mt76_connac_mcu.h
developerf64861f2022-06-22 11:44:53 +080024@@ -971,6 +971,7 @@ enum {
developere2cc0fa2022-03-29 17:31:03 +080025 MCU_EXT_EVENT_CSA_NOTIFY = 0x4f,
26 MCU_EXT_EVENT_BCC_NOTIFY = 0x75,
27 MCU_EXT_EVENT_MURU_CTRL = 0x9f,
28+ MCU_EXT_EVENT_CSI_REPORT = 0xc2,
29 };
30
31 enum {
developerf64861f2022-06-22 11:44:53 +080032@@ -1141,6 +1142,7 @@ enum {
developere2cc0fa2022-03-29 17:31:03 +080033 MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab,
34 MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac,
35 MCU_EXT_CMD_PHY_STAT_INFO = 0xad,
36+ MCU_EXT_CMD_CSI_CTRL = 0xc2,
37 };
38
39 enum {
40diff --git a/mt7915/Makefile b/mt7915/Makefile
developer4721e252022-06-21 16:41:28 +080041index a3474e2..e272c82 100644
developere2cc0fa2022-03-29 17:31:03 +080042--- a/mt7915/Makefile
43+++ b/mt7915/Makefile
44@@ -1,9 +1,9 @@
45 # SPDX-License-Identifier: ISC
46-
47+EXTRA_CFLAGS += -DCONFIG_MTK_VENDOR
48 obj-$(CONFIG_MT7915E) += mt7915e.o
49
50 mt7915e-y := pci.o init.o dma.o eeprom.o main.o mcu.o mac.o \
51- debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o
52+ debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o vendor.o
53
54 mt7915e-$(CONFIG_NL80211_TESTMODE) += testmode.o
55 mt7915e-$(CONFIG_MT7986_WMAC) += soc.o
56\ No newline at end of file
57diff --git a/mt7915/init.c b/mt7915/init.c
developer4721e252022-06-21 16:41:28 +080058index 8554c9d..fa9568c 100644
developere2cc0fa2022-03-29 17:31:03 +080059--- a/mt7915/init.c
60+++ b/mt7915/init.c
developerf64861f2022-06-22 11:44:53 +080061@@ -542,6 +542,12 @@ mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy)
developere2cc0fa2022-03-29 17:31:03 +080062 /* init wiphy according to mphy and phy */
63 mt7915_init_wiphy(mphy->hw);
64
65+#ifdef CONFIG_MTK_VENDOR
66+ INIT_LIST_HEAD(&phy->csi.csi_list);
67+ spin_lock_init(&phy->csi.csi_lock);
68+ mt7915_vendor_register(phy);
69+#endif
70+
71 ret = mt76_register_phy(mphy, true, mt76_rates,
72 ARRAY_SIZE(mt76_rates));
73 if (ret)
developerf64861f2022-06-22 11:44:53 +080074@@ -1032,6 +1038,25 @@ void mt7915_set_stream_he_caps(struct mt7915_phy *phy)
developere2cc0fa2022-03-29 17:31:03 +080075 }
76 }
77
78+#ifdef CONFIG_MTK_VENDOR
79+static int mt7915_unregister_features(struct mt7915_phy *phy)
80+{
81+ struct csi_data *c, *tmp_c;
82+
83+ spin_lock_bh(&phy->csi.csi_lock);
84+ phy->csi.enable = 0;
85+
86+ list_for_each_entry_safe(c, tmp_c, &phy->csi.csi_list, node) {
87+ list_del(&c->node);
88+ kfree(c);
89+ }
90+ spin_unlock_bh(&phy->csi.csi_lock);
91+
92+
93+ return 0;
94+}
95+#endif
96+
97 static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
98 {
99 struct mt7915_phy *phy = mt7915_ext_phy(dev);
developerf64861f2022-06-22 11:44:53 +0800100@@ -1040,6 +1065,10 @@ static void mt7915_unregister_ext_phy(struct mt7915_dev *dev)
developere2cc0fa2022-03-29 17:31:03 +0800101 if (!phy)
102 return;
103
104+#ifdef CONFIG_MTK_VENDOR
105+ mt7915_unregister_features(phy);
106+#endif
107+
108 mt7915_unregister_thermal(phy);
109 mt76_unregister_phy(mphy);
110 ieee80211_free_hw(mphy->hw);
developerf64861f2022-06-22 11:44:53 +0800111@@ -1052,6 +1081,10 @@ static void mt7915_stop_hardware(struct mt7915_dev *dev)
developere2cc0fa2022-03-29 17:31:03 +0800112 mt7915_dma_cleanup(dev);
113 tasklet_disable(&dev->irq_tasklet);
114
115+#ifdef CONFIG_MTK_VENDOR
116+ mt7915_unregister_features(&dev->phy);
117+#endif
118+
119 if (is_mt7986(&dev->mt76))
120 mt7986_wmac_disable(dev);
121 }
developerf64861f2022-06-22 11:44:53 +0800122@@ -1092,6 +1125,12 @@ int mt7915_register_device(struct mt7915_dev *dev)
developere2cc0fa2022-03-29 17:31:03 +0800123 dev->mt76.test_ops = &mt7915_testmode_ops;
124 #endif
125
126+#ifdef CONFIG_MTK_VENDOR
127+ INIT_LIST_HEAD(&dev->phy.csi.csi_list);
128+ spin_lock_init(&dev->phy.csi.csi_lock);
129+ mt7915_vendor_register(&dev->phy);
130+#endif
131+
132 /* init led callbacks */
133 if (IS_ENABLED(CONFIG_MT76_LEDS)) {
134 dev->mt76.led_cdev.brightness_set = mt7915_led_set_brightness;
135diff --git a/mt7915/mcu.c b/mt7915/mcu.c
developerbd398d52022-06-06 20:53:24 +0800136old mode 100755
137new mode 100644
developer4721e252022-06-21 16:41:28 +0800138index 4ff13c7..0941bf3
developere2cc0fa2022-03-29 17:31:03 +0800139--- a/mt7915/mcu.c
140+++ b/mt7915/mcu.c
developerf64861f2022-06-22 11:44:53 +0800141@@ -32,6 +32,10 @@
developere2cc0fa2022-03-29 17:31:03 +0800142 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p)
143 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m)
144
145+#ifdef CONFIG_MTK_VENDOR
146+static int mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb);
147+#endif
148+
149 static u8
150 mt7915_mcu_get_sta_nss(u16 mcs_map)
151 {
developerf64861f2022-06-22 11:44:53 +0800152@@ -351,6 +355,11 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb)
developere2cc0fa2022-03-29 17:31:03 +0800153 case MCU_EXT_EVENT_FW_LOG_2_HOST:
154 mt7915_mcu_rx_log_message(dev, skb);
155 break;
156+#ifdef CONFIG_MTK_VENDOR
157+ case MCU_EXT_EVENT_CSI_REPORT:
158+ mt7915_mcu_report_csi(dev, skb);
159+ break;
160+#endif
161 case MCU_EXT_EVENT_BCC_NOTIFY:
162 mt7915_mcu_rx_bcc_notify(dev, skb);
163 break;
developer4721e252022-06-21 16:41:28 +0800164@@ -3446,6 +3455,108 @@ int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
developere2cc0fa2022-03-29 17:31:03 +0800165 &req, sizeof(req), true);
166 }
167
168+#ifdef CONFIG_MTK_VENDOR
169+int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode,
170+ u8 cfg, u8 v1, u32 v2, u8 *mac_addr)
171+{
172+ struct mt7915_dev *dev = phy->dev;
173+ struct mt7915_mcu_csi req = {
174+ .band = phy != &dev->phy,
175+ .mode = mode,
176+ .cfg = cfg,
177+ .v1 = v1,
178+ .v2 = cpu_to_le32(v2),
179+ };
180+
181+ if (is_valid_ether_addr(mac_addr))
182+ ether_addr_copy(req.mac_addr, mac_addr);
183+
184+ return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(CSI_CTRL), &req,
185+ sizeof(req), false);
186+}
187+
188+static int
189+mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb)
190+{
developerf64861f2022-06-22 11:44:53 +0800191+ struct mt76_connac2_mcu_rxd *rxd = (struct mt76_connac2_mcu_rxd *)skb->data;
developere2cc0fa2022-03-29 17:31:03 +0800192+ struct mt7915_phy *phy = &dev->phy;
193+ struct mt7915_mcu_csi_report *cr;
194+ struct csi_data *csi;
195+ int len, i;
196+
developerf64861f2022-06-22 11:44:53 +0800197+ skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd));
developere2cc0fa2022-03-29 17:31:03 +0800198+
developerf64861f2022-06-22 11:44:53 +0800199+ len = le16_to_cpu(rxd->len) - sizeof(struct mt76_connac2_mcu_rxd) + 24;
developere2cc0fa2022-03-29 17:31:03 +0800200+ if (len < sizeof(*cr))
201+ return -EINVAL;
202+
203+ cr = (struct mt7915_mcu_csi_report *)skb->data;
204+
205+ if (phy->csi.interval &&
206+ le32_to_cpu(cr->ts) < phy->csi.last_record + phy->csi.interval)
207+ return 0;
208+
209+ csi = kzalloc(sizeof(*csi), GFP_KERNEL);
210+ if (!csi)
211+ return -ENOMEM;
212+
213+#define SET_CSI_DATA(_field) csi->_field = le32_to_cpu(cr->_field)
214+ SET_CSI_DATA(ch_bw);
215+ SET_CSI_DATA(rssi);
216+ SET_CSI_DATA(snr);
217+ SET_CSI_DATA(data_num);
218+ SET_CSI_DATA(data_bw);
219+ SET_CSI_DATA(pri_ch_idx);
220+ SET_CSI_DATA(info);
221+ SET_CSI_DATA(rx_mode);
222+ SET_CSI_DATA(h_idx);
223+ SET_CSI_DATA(ts);
224+
225+ SET_CSI_DATA(band);
226+ if (csi->band && !phy->band_idx)
227+ phy = mt7915_ext_phy(dev);
228+#undef SET_CSI_DATA
229+
230+ for (i = 0; i < csi->data_num; i++) {
231+ csi->data_i[i] = le16_to_cpu(cr->data_i[i]);
232+ csi->data_q[i] = le16_to_cpu(cr->data_q[i]);
233+ }
234+
235+ memcpy(csi->ta, cr->ta, ETH_ALEN);
236+ csi->tx_idx = le32_get_bits(cr->trx_idx, GENMASK(31, 16));
237+ csi->rx_idx = le32_get_bits(cr->trx_idx, GENMASK(15, 0));
238+
239+ INIT_LIST_HEAD(&csi->node);
240+ spin_lock_bh(&phy->csi.csi_lock);
241+
242+ if (!phy->csi.enable) {
243+ kfree(csi);
244+ spin_unlock_bh(&phy->csi.csi_lock);
245+ return 0;
246+ }
247+
248+ list_add_tail(&csi->node, &phy->csi.csi_list);
249+ phy->csi.count++;
250+
251+ if (phy->csi.count > CSI_MAX_BUF_NUM) {
252+ struct csi_data *old;
253+
254+ old = list_first_entry(&phy->csi.csi_list,
255+ struct csi_data, node);
256+
257+ list_del(&old->node);
258+ kfree(old);
259+ phy->csi.count--;
260+ }
261+
262+ if (csi->h_idx & BIT(15)) /* last chain */
263+ phy->csi.last_record = csi->ts;
264+ spin_unlock_bh(&phy->csi.csi_lock);
265+
266+ return 0;
267+}
268+#endif
269+
270 #ifdef MTK_DEBUG
271 int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp)
272 {
273diff --git a/mt7915/mcu.h b/mt7915/mcu.h
developer4721e252022-06-21 16:41:28 +0800274index b2c51bf..ec8887b 100644
developere2cc0fa2022-03-29 17:31:03 +0800275--- a/mt7915/mcu.h
276+++ b/mt7915/mcu.h
developerf64861f2022-06-22 11:44:53 +0800277@@ -476,4 +476,80 @@ enum {
developerbd398d52022-06-06 20:53:24 +0800278 sizeof(struct bss_info_bcn_cont) + \
279 sizeof(struct bss_info_inband_discovery))
developere2cc0fa2022-03-29 17:31:03 +0800280
281+#ifdef CONFIG_MTK_VENDOR
282+struct mt7915_mcu_csi {
283+ u8 band;
284+ u8 mode;
285+ u8 cfg;
286+ u8 v1;
287+ __le32 v2;
288+ u8 mac_addr[ETH_ALEN];
289+ u8 _rsv[34];
290+} __packed;
291+
292+struct csi_tlv {
293+ __le32 tag;
294+ __le32 len;
295+} __packed;
296+
297+#define CSI_MAX_COUNT 256
298+#define CSI_MAX_BUF_NUM 3000
299+
300+struct mt7915_mcu_csi_report {
301+ struct csi_tlv _t0;
302+ __le32 ver;
303+ struct csi_tlv _t1;
304+ __le32 ch_bw;
305+ struct csi_tlv _t2;
306+ __le32 rssi;
307+ struct csi_tlv _t3;
308+ __le32 snr;
309+ struct csi_tlv _t4;
310+ __le32 band;
311+ struct csi_tlv _t5;
312+ __le32 data_num;
313+ struct csi_tlv _t6;
314+ __le16 data_i[CSI_MAX_COUNT];
315+ struct csi_tlv _t7;
316+ __le16 data_q[CSI_MAX_COUNT];
317+ struct csi_tlv _t8;
318+ __le32 data_bw;
319+ struct csi_tlv _t9;
320+ __le32 pri_ch_idx;
321+ struct csi_tlv _t10;
322+ u8 ta[8];
323+ struct csi_tlv _t11;
324+ __le32 info;
325+ struct csi_tlv _t12;
326+ __le32 rx_mode;
327+ struct csi_tlv _t17;
328+ __le32 h_idx;
329+ struct csi_tlv _t18;
330+ __le32 trx_idx;
331+ struct csi_tlv _t19;
332+ __le32 ts;
333+} __packed;
334+
335+struct csi_data {
336+ u8 ch_bw;
337+ u16 data_num;
338+ s16 data_i[CSI_MAX_COUNT];
339+ s16 data_q[CSI_MAX_COUNT];
340+ u8 band;
341+ s8 rssi;
342+ u8 snr;
343+ u32 ts;
344+ u8 data_bw;
345+ u8 pri_ch_idx;
346+ u8 ta[ETH_ALEN];
347+ u32 info;
348+ u8 rx_mode;
349+ u32 h_idx;
350+ u16 tx_idx;
351+ u16 rx_idx;
352+
353+ struct list_head node;
354+};
355+#endif
356+
357 #endif
358diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h
developer4721e252022-06-21 16:41:28 +0800359index 594f2fb..5a6224b 100644
developere2cc0fa2022-03-29 17:31:03 +0800360--- a/mt7915/mt7915.h
361+++ b/mt7915/mt7915.h
developerf64861f2022-06-22 11:44:53 +0800362@@ -276,6 +276,20 @@ struct mt7915_phy {
developere2cc0fa2022-03-29 17:31:03 +0800363 u8 spe_idx;
364 } test;
365 #endif
366+
367+#ifdef CONFIG_MTK_VENDOR
368+ struct {
369+ struct list_head csi_list;
370+ spinlock_t csi_lock;
371+ u32 count;
372+ bool mask;
373+ bool reorder;
374+ bool enable;
375+
376+ u32 interval;
377+ u32 last_record;
378+ } csi;
379+#endif
380 };
381
382 struct mt7915_dev {
developer4721e252022-06-21 16:41:28 +0800383@@ -616,6 +630,12 @@ void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
developere2cc0fa2022-03-29 17:31:03 +0800384 struct ieee80211_sta *sta, struct dentry *dir);
385 #endif
386
387+#ifdef CONFIG_MTK_VENDOR
388+void mt7915_vendor_register(struct mt7915_phy *phy);
389+int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode,
390+ u8 cfg, u8 v1, u32 v2, u8 *mac_addr);
391+#endif
392+
393 #ifdef MTK_DEBUG
394 int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir);
395 int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp);
396diff --git a/mt7915/vendor.c b/mt7915/vendor.c
397new file mode 100644
developer4721e252022-06-21 16:41:28 +0800398index 0000000..98fd9c2
developere2cc0fa2022-03-29 17:31:03 +0800399--- /dev/null
400+++ b/mt7915/vendor.c
401@@ -0,0 +1,452 @@
402+// SPDX-License-Identifier: ISC
403+/*
404+ * Copyright (C) 2020, MediaTek Inc. All rights reserved.
405+ */
406+
407+#include <net/netlink.h>
408+
409+#include "mt7915.h"
410+#include "mcu.h"
411+#include "vendor.h"
412+
413+static const struct nla_policy
414+csi_ctrl_policy[NUM_MTK_VENDOR_ATTRS_CSI_CTRL] = {
415+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG] = {.type = NLA_NESTED },
416+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE] = { .type = NLA_U8 },
417+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE] = { .type = NLA_U8 },
418+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1] = { .type = NLA_U8 },
419+ [MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2] = { .type = NLA_U8 },
420+ [MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR] = { .type = NLA_NESTED },
421+ [MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL] = { .type = NLA_U32 },
422+ [MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM] = { .type = NLA_U16 },
423+ [MTK_VENDOR_ATTR_CSI_CTRL_DATA] = { .type = NLA_NESTED },
424+};
425+
426+struct csi_null_tone {
427+ u8 start;
428+ u8 end;
429+};
430+
431+struct csi_reorder{
432+ u8 dest;
433+ u8 start;
434+ u8 end;
435+};
436+
437+struct csi_mask {
438+ struct csi_null_tone null[10];
439+ u8 pilot[8];
440+ struct csi_reorder ro[3];
441+};
442+
443+static const struct csi_mask csi_mask_groups[] = {
444+ /* OFDM */
445+ { .null = { { 0 }, { 27, 37 } },
446+ .ro = { {0, 0, 63} },
447+ },
448+ { .null = { { 0, 69 }, { 96 }, { 123, 127 } },
449+ .ro = { { 0, 96 }, { 38, 70, 95 }, { 1, 97, 122 } },
450+ },
451+ { .null = { { 0, 5 }, { 32 }, { 59, 127 } },
452+ .ro = { { 0, 32 }, { 38, 6, 31 }, { 1, 33, 58 } },
453+ },
454+ { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 127 } },
455+ .ro = { { 0, 0, 127 } },
456+ },
457+ { .null = { { 0, 133 }, { 160 }, { 187, 255 } },
458+ .ro = { { 0, 160 }, { 1, 161, 186 }, { 38, 134, 159 } },
459+ },
460+ { .null = { { 0, 197 }, { 224 }, { 251, 255 } },
461+ .ro = { { 0, 224 }, { 1, 225, 250 }, { 38, 198, 223 } },
462+ },
463+ { .null = { { 0, 5 }, { 32 }, { 59, 255 } },
464+ .ro = { { 0, 32 }, { 1, 33, 58 }, { 38, 6, 31 } },
465+ },
466+ { .null = { { 0, 69 }, { 96 }, { 123, 255 } },
467+ .ro = { { 0, 96 }, { 1, 97, 122 }, { 38, 70, 95 } },
468+ },
469+ { .null = { { 0, 133 }, { 160 }, { 187, 197 }, { 224 }, { 251, 255 } },
470+ .ro = { { 0, 192 }, { 2, 198, 250 }, { 74, 134, 186 } },
471+ },
472+ { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 255 } },
473+ .ro = { { 0, 64 }, { 2, 70, 122 }, { 74, 6, 58 } },
474+ },
475+ { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 133 },
476+ { 160 }, { 187, 197 }, { 224 }, { 251, 255 } },
477+ .ro = { { 0, 0, 255 } },
478+ },
479+
480+ /* HT/VHT */
481+ { .null = { { 0 }, { 29, 35 } },
482+ .pilot = { 7, 21, 43, 57 },
483+ .ro = { { 0, 0, 63 } },
484+ },
485+ { .null = { { 0, 67 }, { 96 }, { 125, 127 } },
486+ .pilot = { 75, 89, 103, 117 },
487+ .ro = { { 0, 96 }, { 36, 68, 95 }, { 1, 97, 124 } },
488+ },
489+ { .null = { { 0, 3 }, { 32 }, { 61, 127 } },
490+ .pilot = { 11, 25, 39, 53 },
491+ .ro = { { 0, 32 }, { 36, 4, 31 }, { 1, 33, 60 } },
492+ },
493+ { .null = { { 0, 1 }, { 59, 69 }, { 127 } },
494+ .pilot = { 11, 25, 53, 75, 103, 117 },
495+ .ro = { { 0, 0, 127 } },
496+ },
497+ { .null = { { 0, 131 }, { 160 }, { 189, 255 } },
498+ .pilot = { 139, 153, 167, 181 },
499+ .ro = { { 0, 160 }, { 1, 161, 188 }, { 36, 132, 159 } },
500+ },
501+ { .null = { { 0, 195 }, { 224 }, { 253 }, { 255 } },
502+ .pilot = { 203, 217, 231, 245 },
503+ .ro = { { 0, 224 }, { 1, 225, 252 }, { 36, 196, 223 } },
504+ },
505+ { .null = { { 0, 3 }, { 32 }, { 61, 255 } },
506+ .pilot = { 11, 25, 39, 53 },
507+ .ro = { { 0, 32 }, { 1, 33, 60 }, { 36, 4, 31 } },
508+ },
509+ { .null = { { 0, 67 }, { 96 }, { 125, 255 } },
510+ .pilot = { 75, 89, 103, 117 },
511+ .ro = { { 0, 96 }, { 1, 97, 124 }, { 36, 68, 95 } },
512+ },
513+ { .null = { { 0, 133 }, { 191, 193 }, { 251, 255 } },
514+ .pilot = { 139, 167, 181, 203, 217, 245 },
515+ .ro = { { 0, 192 }, { 2, 194, 250 }, { 70, 134, 190 } },
516+ },
517+ { .null = { { 0, 5 }, { 63, 65 }, { 123, 127 } },
518+ .pilot = { 11, 39, 53, 75, 89, 117 },
519+ .ro = { { 0, 64 }, { 2, 66, 122 }, { 70, 6, 62 } },
520+ },
521+ { .null = { { 0, 1 }, { 123, 133 }, { 255 } },
522+ .pilot = { 11, 39, 75, 103, 153, 181, 217, 245 },
523+ .ro = { { 0, 0, 255 } },
524+ },
525+
526+ /* HE */
527+ { .null = { { 0 }, { 31, 33 } },
528+ .pilot = { 12, 29, 35, 52 },
529+ .ro = { { 0, 0, 63 } },
530+ },
531+ { .null = { { 30, 34 }, { 96 } },
532+ .pilot = { 4, 21, 43, 60, 70, 87, 105, 122 },
533+ .ro = { { 0, 96 }, { 34, 66, 95 }, { 1, 97, 126 } },
534+ },
535+ { .null = { { 32 }, { 94, 98 } },
536+ .pilot = { 6, 23, 41, 58, 68, 85, 107, 124 },
537+ .ro = { { 0, 32 }, { 34, 2, 31 }, { 1, 31, 62 } },
538+ },
539+ { .null = { { 0 }, { 62, 66 } },
540+ .pilot = { 9, 26, 36, 53, 75, 92, 102, 119 },
541+ .ro = { { 0, 0, 127 } },
542+ },
543+ { .null = { { 30, 34 }, { 160 } },
544+ .pilot = { 4, 21, 43, 60, 137, 154, 166, 183 },
545+ .ro = { { 0, 160 }, { 1, 161, 190 }, { 34, 130, 159 } },
546+ },
547+ { .null = { { 94, 98 }, { 224 } },
548+ .pilot = { 68, 85, 107, 124, 201, 218, 230, 247 },
549+ .ro = { { 0, 224 }, { 1, 225, 254 }, { 34, 194, 223 } },
550+ },
551+ { .null = { { 32 }, { 158, 162 } },
552+ .pilot = { 9, 26, 38, 55, 132, 149, 171, 188 },
553+ .ro = { { 0, 32 }, { 1, 33, 62 }, { 34, 2, 31 } },
554+ },
555+ { .null = { { 96 }, { 222, 226 } },
556+ .pilot = { 73, 90, 102, 119, 196, 213, 235, 252 },
557+ .ro = { { 0, 96 }, { 1, 97, 126 }, { 34, 66, 95 } },
558+ },
559+ { .null = { { 62, 66 }, { 192 } },
560+ .pilot = { 36, 53, 75, 92, 169, 186, 198, 215 },
561+ .ro = { { 0, 192 }, { 1, 193, 253 }, { 67, 131, 191 } },
562+ },
563+ { .null = { { 64 }, { 190, 194 } },
564+ .pilot = { 41, 58, 70, 87, 164, 181, 203, 220 },
565+ .ro = { { 0, 64 }, { 1, 65, 125 }, { 67, 3, 63 } },
566+ },
567+ { .null = { { 0 }, { 126, 130 } },
568+ .pilot = { 6, 23, 100, 117, 139, 156, 233, 250 },
569+ .ro = { { 0, 0, 255 } },
570+ },
571+};
572+
573+static inline u8 csi_group_idx(u8 mode, u8 ch_bw, u8 data_bw, u8 pri_ch_idx)
574+{
575+ if (ch_bw < 2 || data_bw < 1)
576+ return mode * 11 + ch_bw * ch_bw + pri_ch_idx;
577+ else
578+ return mode * 11 + ch_bw * ch_bw + (data_bw + 1) * 2 + pri_ch_idx;
579+}
580+
581+static int mt7915_vendor_csi_ctrl(struct wiphy *wiphy,
582+ struct wireless_dev *wdev,
583+ const void *data,
584+ int data_len)
585+{
586+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
587+ struct mt7915_phy *phy = mt7915_hw_phy(hw);
588+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_CSI_CTRL];
589+ int err;
590+
591+ err = nla_parse(tb, MTK_VENDOR_ATTR_CSI_CTRL_MAX, data, data_len,
592+ csi_ctrl_policy, NULL);
593+ if (err)
594+ return err;
595+
596+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_CFG]) {
597+ u8 mode = 0, type = 0, v1 = 0, v2 = 0;
598+ u8 mac_addr[ETH_ALEN] = {};
599+ struct nlattr *cur;
600+ int rem;
601+
602+ nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_CSI_CTRL_CFG], rem) {
603+ switch(nla_type(cur)) {
604+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE:
605+ mode = nla_get_u8(cur);
606+ break;
607+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE:
608+ type = nla_get_u8(cur);
609+ break;
610+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1:
611+ v1 = nla_get_u8(cur);
612+ break;
613+ case MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2:
614+ v2 = nla_get_u8(cur);
615+ break;
616+ default:
617+ return -EINVAL;
618+ };
619+ }
620+
621+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR]) {
622+ int idx = 0;
623+
624+ nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR], rem) {
625+ mac_addr[idx++] = nla_get_u8(cur);
626+ }
627+ }
628+
629+ mt7915_mcu_set_csi(phy, mode, type, v1, v2, mac_addr);
630+
631+ spin_lock_bh(&phy->csi.csi_lock);
632+
633+ phy->csi.enable = !!mode;
634+
635+ if (mode == 2 && type == 5) {
636+ if (v1 >= 1)
637+ phy->csi.mask = 1;
638+ if (v1 == 2)
639+ phy->csi.reorder = 1;
640+ }
641+
642+ /* clean up old csi stats */
643+ if ((mode == 0 || mode == 2) && !list_empty(&phy->csi.csi_list)) {
644+ struct csi_data *c, *tmp_c;
645+
646+ list_for_each_entry_safe(c, tmp_c, &phy->csi.csi_list,
647+ node) {
648+ list_del(&c->node);
649+ kfree(c);
650+ phy->csi.count--;
651+ }
652+ } else if (mode == 1) {
653+ phy->csi.last_record = 0;
654+ }
655+
656+ spin_unlock_bh(&phy->csi.csi_lock);
657+ }
658+
659+ if (tb[MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL])
660+ phy->csi.interval = nla_get_u32(tb[MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL]);
661+
662+ return 0;
663+}
664+
665+static void
666+mt7915_vendor_csi_tone_mask(struct mt7915_phy *phy, struct csi_data *csi)
667+{
668+ static const u8 mode_map[] = {
669+ [MT_PHY_TYPE_OFDM] = 0,
670+ [MT_PHY_TYPE_HT] = 1,
671+ [MT_PHY_TYPE_VHT] = 1,
672+ [MT_PHY_TYPE_HE_SU] = 2,
673+ };
674+ const struct csi_mask *cmask;
675+ int i;
676+
677+ if (csi->rx_mode == MT_PHY_TYPE_CCK || !phy->csi.mask)
678+ return;
679+
680+ if (csi->data_bw == IEEE80211_STA_RX_BW_40)
681+ csi->pri_ch_idx /= 2;
682+
683+ cmask = &csi_mask_groups[csi_group_idx(mode_map[csi->rx_mode],
684+ csi->ch_bw,
685+ csi->data_bw,
686+ csi->pri_ch_idx)];
687+
688+ for (i = 0; i < 10; i++) {
689+ const struct csi_null_tone *ntone = &cmask->null[i];
690+ u8 start = ntone->start;
691+ u8 end = ntone->end;
692+ int j;
693+
694+ if (!start && !end && i > 0)
695+ break;
696+
697+ if (!end)
698+ end = start;
699+
700+ for (j = start; j <= end; j++) {
701+ csi->data_i[j] = 0;
702+ csi->data_q[j] = 0;
703+ }
704+ }
705+
706+ for (i = 0; i < 8; i++) {
707+ u8 pilot = cmask->pilot[i];
708+
709+ if (!pilot)
710+ break;
711+
712+ csi->data_i[pilot] = 0;
713+ csi->data_q[pilot] = 0;
714+ }
715+
716+ if (!phy->csi.reorder)
717+ return;
718+
719+ for (i = 0; i < 3; i++) {
720+ const struct csi_reorder *ro = &cmask->ro[i];
721+ u8 dest = ro->dest;
722+ u8 start = ro->start;
723+ u8 end = ro->end;
724+
725+ if (!dest && !start && !end)
726+ break;
727+
728+ if (dest == start)
729+ continue;
730+
731+ if (end) {
732+ memmove(&csi->data_i[dest], &csi->data_i[start],
733+ end - start + 1);
734+ memmove(&csi->data_q[dest], &csi->data_q[start],
735+ end - start + 1);
736+ } else {
737+ csi->data_i[dest] = csi->data_i[start];
738+ csi->data_q[dest] = csi->data_q[start];
739+ }
740+ }
741+}
742+
743+static int
744+mt7915_vendor_csi_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev,
745+ struct sk_buff *skb, const void *data, int data_len,
746+ unsigned long *storage)
747+{
748+#define RESERVED_SET BIT(31)
749+ struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
750+ struct mt7915_phy *phy = mt7915_hw_phy(hw);
751+ struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_CSI_CTRL];
752+ int err = 0;
753+
754+ if (*storage & RESERVED_SET) {
755+ if ((*storage & GENMASK(15, 0)) == 0)
756+ return -ENOENT;
757+ (*storage)--;
758+ }
759+
760+ if (data) {
761+ err = nla_parse(tb, MTK_VENDOR_ATTR_CSI_CTRL_MAX, data, data_len,
762+ csi_ctrl_policy, NULL);
763+ if (err)
764+ return err;
765+ }
766+
767+ if (!(*storage & RESERVED_SET) && tb[MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM]) {
768+ *storage = nla_get_u16(tb[MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM]);
769+ *storage |= RESERVED_SET;
770+ }
771+
772+ spin_lock_bh(&phy->csi.csi_lock);
773+
774+ if (!list_empty(&phy->csi.csi_list)) {
775+ struct csi_data *csi;
776+ void *a, *b;
777+ int i;
778+
779+ csi = list_first_entry(&phy->csi.csi_list, struct csi_data, node);
780+
781+ mt7915_vendor_csi_tone_mask(phy, csi);
782+
783+ a = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_CTRL_DATA);
784+
785+ if (nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_VER, 1) ||
786+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_RSSI, csi->rssi) ||
787+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_SNR, csi->snr) ||
788+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_BW, csi->data_bw) ||
789+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_CH_IDX, csi->pri_ch_idx) ||
790+ nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_MODE, csi->rx_mode))
791+ goto out;
792+
793+ if (nla_put_u16(skb, MTK_VENDOR_ATTR_CSI_DATA_TX_ANT, csi->tx_idx) ||
794+ nla_put_u16(skb, MTK_VENDOR_ATTR_CSI_DATA_RX_ANT, csi->rx_idx))
795+ goto out;
796+
797+ if (nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_INFO, csi->info) ||
798+ nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_H_IDX, csi->h_idx) ||
799+ nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_TS, csi->ts))
800+ goto out;
801+
802+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_TA);
803+ for (i = 0; i < ARRAY_SIZE(csi->ta); i++)
804+ if (nla_put_u8(skb, i, csi->ta[i]))
805+ goto out;
806+ nla_nest_end(skb, b);
807+
808+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_I);
809+ for (i = 0; i < ARRAY_SIZE(csi->data_i); i++)
810+ if (nla_put_u16(skb, i, csi->data_i[i]))
811+ goto out;
812+ nla_nest_end(skb, b);
813+
814+ b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_Q);
815+ for (i = 0; i < ARRAY_SIZE(csi->data_q); i++)
816+ if (nla_put_u16(skb, i, csi->data_q[i]))
817+ goto out;
818+ nla_nest_end(skb, b);
819+
820+ nla_nest_end(skb, a);
821+
822+ list_del(&csi->node);
823+ kfree(csi);
824+ phy->csi.count--;
825+
826+ err = phy->csi.count;
827+ }
828+out:
829+ spin_unlock_bh(&phy->csi.csi_lock);
830+
831+ return err;
832+}
833+
834+static const struct wiphy_vendor_command mt7915_vendor_commands[] = {
835+ {
836+ .info = {
837+ .vendor_id = MTK_NL80211_VENDOR_ID,
838+ .subcmd = MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL,
839+ },
840+ .flags = WIPHY_VENDOR_CMD_NEED_NETDEV |
841+ WIPHY_VENDOR_CMD_NEED_RUNNING,
842+ .doit = mt7915_vendor_csi_ctrl,
843+ .dumpit = mt7915_vendor_csi_ctrl_dump,
844+ .policy = csi_ctrl_policy,
845+ .maxattr = MTK_VENDOR_ATTR_CSI_CTRL_MAX,
846+ }
847+};
848+
849+void mt7915_vendor_register(struct mt7915_phy *phy)
850+{
851+ phy->mt76->hw->wiphy->vendor_commands = mt7915_vendor_commands;
852+ phy->mt76->hw->wiphy->n_vendor_commands = ARRAY_SIZE(mt7915_vendor_commands);
853+}
854diff --git a/mt7915/vendor.h b/mt7915/vendor.h
855new file mode 100644
developer4721e252022-06-21 16:41:28 +0800856index 0000000..9d3db2a
developere2cc0fa2022-03-29 17:31:03 +0800857--- /dev/null
858+++ b/mt7915/vendor.h
859@@ -0,0 +1,60 @@
860+#ifndef __MT7915_VENDOR_H
861+#define __MT7915_VENDOR_H
862+
863+#define MTK_NL80211_VENDOR_ID 0x0ce7
864+
865+enum mtk_nl80211_vendor_subcmds {
866+ MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2,
867+};
868+
869+enum mtk_vendor_attr_csi_ctrl {
870+ MTK_VENDOR_ATTR_CSI_CTRL_UNSPEC,
871+
872+ MTK_VENDOR_ATTR_CSI_CTRL_CFG,
873+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE,
874+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE,
875+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1,
876+ MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2,
877+ MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR,
878+ MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL,
879+
880+ MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM,
881+
882+ MTK_VENDOR_ATTR_CSI_CTRL_DATA,
883+
884+ /* keep last */
885+ NUM_MTK_VENDOR_ATTRS_CSI_CTRL,
886+ MTK_VENDOR_ATTR_CSI_CTRL_MAX =
887+ NUM_MTK_VENDOR_ATTRS_CSI_CTRL - 1
888+};
889+
890+enum mtk_vendor_attr_csi_data {
891+ MTK_VENDOR_ATTR_CSI_DATA_UNSPEC,
892+ MTK_VENDOR_ATTR_CSI_DATA_PAD,
893+
894+ MTK_VENDOR_ATTR_CSI_DATA_VER,
895+ MTK_VENDOR_ATTR_CSI_DATA_TS,
896+ MTK_VENDOR_ATTR_CSI_DATA_RSSI,
897+ MTK_VENDOR_ATTR_CSI_DATA_SNR,
898+ MTK_VENDOR_ATTR_CSI_DATA_BW,
899+ MTK_VENDOR_ATTR_CSI_DATA_CH_IDX,
900+ MTK_VENDOR_ATTR_CSI_DATA_TA,
901+ MTK_VENDOR_ATTR_CSI_DATA_I,
902+ MTK_VENDOR_ATTR_CSI_DATA_Q,
903+ MTK_VENDOR_ATTR_CSI_DATA_INFO,
904+ MTK_VENDOR_ATTR_CSI_DATA_RSVD1,
905+ MTK_VENDOR_ATTR_CSI_DATA_RSVD2,
906+ MTK_VENDOR_ATTR_CSI_DATA_RSVD3,
907+ MTK_VENDOR_ATTR_CSI_DATA_RSVD4,
908+ MTK_VENDOR_ATTR_CSI_DATA_TX_ANT,
909+ MTK_VENDOR_ATTR_CSI_DATA_RX_ANT,
910+ MTK_VENDOR_ATTR_CSI_DATA_MODE,
911+ MTK_VENDOR_ATTR_CSI_DATA_H_IDX,
912+
913+ /* keep last */
914+ NUM_MTK_VENDOR_ATTRS_CSI_DATA,
915+ MTK_VENDOR_ATTR_CSI_DATA_MAX =
916+ NUM_MTK_VENDOR_ATTRS_CSI_DATA - 1
917+};
918+
919+#endif
920--
developer4721e252022-06-21 16:41:28 +08009212.18.0
developere2cc0fa2022-03-29 17:31:03 +0800922