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developer24455dd2021-10-28 10:55:41 +08001/dts-v1/;
2#include "mt7981.dtsi"
3/ {
4 model = "MediaTek MT7981 RFB";
5 compatible = "mediatek,mt7981-spim-nor-rfb";
6 chosen {
7 bootargs = "console=ttyS0,115200n1 loglevel=8 \
8 earlycon=uart8250,mmio32,0x11002000";
9 };
10
11 memory {
12 // fpga ddr2: 128MB*2
13 reg = <0 0x40000000 0 0x10000000>;
14 };
15};
16
17&uart0 {
18 status = "okay";
19};
20
21&watchdog {
22 status = "okay";
23};
24
25&eth {
26 status = "okay";
27
28 gmac0: mac@0 {
29 compatible = "mediatek,eth-mac";
30 reg = <0>;
31 phy-mode = "2500base-x";
32
33 fixed-link {
34 speed = <2500>;
35 full-duplex;
36 pause;
37 };
38 };
39
40 gmac1: mac@1 {
41 compatible = "mediatek,eth-mac";
42 reg = <1>;
43 phy-mode = "gmii";
44 phy-handle = <&phy0>;
45 };
46
47 mdio: mdio-bus {
48 #address-cells = <1>;
49 #size-cells = <0>;
50
51 phy0: ethernet-phy@0 {
52 reg = <0>;
53 };
54
55 switch@0 {
56 compatible = "mediatek,mt7531";
57 reg = <31>;
58 reset-gpios = <&pio 39 0>;
59
60 ports {
61 #address-cells = <1>;
62 #size-cells = <0>;
63
64 port@0 {
65 reg = <0>;
66 label = "lan1";
67 };
68
69 port@1 {
70 reg = <1>;
71 label = "lan2";
72 };
73
74 port@2 {
75 reg = <2>;
76 label = "lan3";
77 };
78
79 port@3 {
80 reg = <3>;
81 label = "lan4";
82 };
83
84 port@6 {
85 reg = <6>;
86 label = "cpu";
87 ethernet = <&gmac0>;
88 phy-mode = "2500base-x";
89
90 fixed-link {
91 speed = <2500>;
92 full-duplex;
93 pause;
94 };
95 };
96 };
97 };
98 };
99};
100
101&hnat {
102 mtketh-wan = "eth1";
103 mtketh-lan = "lan";
104 mtketh-max-gmac = <2>;
105 status = "okay";
106};
107
108&spi1 {
109 pinctrl-names = "default";
110 pinctrl-0 = <&spic_pins>;
111 status = "disabled";
112};
113
114&spi2 {
115 pinctrl-names = "default";
116 pinctrl-0 = <&spi2_flash_pins>;
117 status = "okay";
118 spi_nor@0 {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 compatible = "jedec,spi-nor";
122 reg = <0>;
123 spi-max-frequency = <52000000>;
124 spi-tx-buswidth = <4>;
125 spi-rx-buswidth = <4>;
126
127 partition@00000 {
128 label = "BL2";
129 reg = <0x00000 0x0040000>;
130 };
131 partition@40000 {
132 label = "u-boot-env";
133 reg = <0x40000 0x0010000>;
134 };
135 partition@50000 {
136 label = "Factory";
137 reg = <0x50000 0x00B0000>;
138 };
139 partition@100000 {
140 label = "FIP";
141 reg = <0x100000 0x0080000>;
142 };
143 partition@180000 {
144 label = "firmware";
145 reg = <0x180000 0xE00000>;
146 };
147 };
148};
149
150&pio {
151 spic_pins: spi1-pins {
152 mux {
153 function = "spi";
154 groups = "spi1_1";
155 };
156 };
157
158 spi2_flash_pins: spi2-pins {
159 mux {
160 function = "spi";
161 groups = "spi2", "spi2_wp_hold";
162 };
163 };
164};
165
166&xhci {
167 status = "okay";
168};
169
170&wed {
171 dy_txbm_enable = "true";
172 dy_txbm_budge = <8>;
173 txbm_init_sz = <10>;
174 status = "okay";
175};