developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 1 | From 3dbd27d810bca208af96102d52ac71d5ce8a44bb Mon Sep 17 00:00:00 2001 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 2 | From: Bo Jiao <Bo.Jiao@mediatek.com> |
developer | bd398d5 | 2022-06-06 20:53:24 +0800 | [diff] [blame] | 3 | Date: Mon, 6 Jun 2022 20:13:02 +0800 |
developer | 2324aa2 | 2023-04-12 11:30:15 +0800 | [diff] [blame] | 4 | Subject: [PATCH 1001/1009] wifi: mt76: mt7915: csi: implement csi support |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 5 | |
| 6 | --- |
developer | 5ce5ea4 | 2022-08-31 14:12:29 +0800 | [diff] [blame] | 7 | mt76_connac_mcu.h | 2 + |
| 8 | mt7915/Makefile | 4 +- |
| 9 | mt7915/init.c | 39 ++++ |
| 10 | mt7915/mcu.c | 111 ++++++++++++ |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 11 | mt7915/mcu.h | 77 ++++++++ |
developer | 5ce5ea4 | 2022-08-31 14:12:29 +0800 | [diff] [blame] | 12 | mt7915/mt7915.h | 20 ++ |
| 13 | mt7915/vendor.c | 452 ++++++++++++++++++++++++++++++++++++++++++++++ |
| 14 | mt7915/vendor.h | 60 ++++++ |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 15 | 8 files changed, 763 insertions(+), 2 deletions(-) |
developer | 5ce5ea4 | 2022-08-31 14:12:29 +0800 | [diff] [blame] | 16 | create mode 100644 mt7915/vendor.c |
| 17 | create mode 100644 mt7915/vendor.h |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 18 | |
| 19 | diff --git a/mt76_connac_mcu.h b/mt76_connac_mcu.h |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 20 | index 82e323c8..13214452 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 21 | --- a/mt76_connac_mcu.h |
| 22 | +++ b/mt76_connac_mcu.h |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 23 | @@ -1000,6 +1000,7 @@ enum { |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 24 | MCU_EXT_EVENT_CSA_NOTIFY = 0x4f, |
| 25 | MCU_EXT_EVENT_BCC_NOTIFY = 0x75, |
| 26 | MCU_EXT_EVENT_MURU_CTRL = 0x9f, |
| 27 | + MCU_EXT_EVENT_CSI_REPORT = 0xc2, |
| 28 | }; |
| 29 | |
developer | 144824b | 2022-11-25 21:27:43 +0800 | [diff] [blame] | 30 | /* unified event table */ |
developer | 4f0d84b | 2023-03-03 14:21:44 +0800 | [diff] [blame] | 31 | @@ -1193,6 +1194,7 @@ enum { |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 32 | MCU_EXT_CMD_GROUP_PRE_CAL_INFO = 0xab, |
| 33 | MCU_EXT_CMD_DPD_PRE_CAL_INFO = 0xac, |
| 34 | MCU_EXT_CMD_PHY_STAT_INFO = 0xad, |
| 35 | + MCU_EXT_CMD_CSI_CTRL = 0xc2, |
| 36 | }; |
| 37 | |
| 38 | enum { |
| 39 | diff --git a/mt7915/Makefile b/mt7915/Makefile |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 40 | index cbcb64be..6a922a9f 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 41 | --- a/mt7915/Makefile |
| 42 | +++ b/mt7915/Makefile |
developer | c04f540 | 2023-02-03 09:22:26 +0800 | [diff] [blame] | 43 | @@ -1,10 +1,10 @@ |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 44 | # SPDX-License-Identifier: ISC |
developer | c04f540 | 2023-02-03 09:22:26 +0800 | [diff] [blame] | 45 | |
| 46 | -EXTRA_CFLAGS += -DCONFIG_MT76_LEDS |
| 47 | +EXTRA_CFLAGS += -DCONFIG_MT76_LEDS -DCONFIG_MTK_VENDOR |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 48 | obj-$(CONFIG_MT7915E) += mt7915e.o |
| 49 | |
| 50 | mt7915e-y := pci.o init.o dma.o eeprom.o main.o mcu.o mac.o \ |
| 51 | - debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o |
| 52 | + debugfs.o mmio.o mtk_debugfs.o mtk_mcu.o vendor.o |
| 53 | |
| 54 | mt7915e-$(CONFIG_NL80211_TESTMODE) += testmode.o |
developer | bbedb24 | 2022-11-15 15:02:35 +0800 | [diff] [blame] | 55 | mt7915e-$(CONFIG_MT7986_WMAC) += soc.o |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 56 | diff --git a/mt7915/init.c b/mt7915/init.c |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 57 | index 611a82b6..d21086d1 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 58 | --- a/mt7915/init.c |
| 59 | +++ b/mt7915/init.c |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 60 | @@ -666,6 +666,12 @@ mt7915_register_ext_phy(struct mt7915_dev *dev, struct mt7915_phy *phy) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 61 | /* init wiphy according to mphy and phy */ |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 62 | mt7915_init_wiphy(phy); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 63 | |
| 64 | +#ifdef CONFIG_MTK_VENDOR |
| 65 | + INIT_LIST_HEAD(&phy->csi.csi_list); |
| 66 | + spin_lock_init(&phy->csi.csi_lock); |
| 67 | + mt7915_vendor_register(phy); |
| 68 | +#endif |
| 69 | + |
| 70 | ret = mt76_register_phy(mphy, true, mt76_rates, |
| 71 | ARRAY_SIZE(mt76_rates)); |
| 72 | if (ret) |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 73 | @@ -1167,6 +1173,25 @@ void mt7915_set_stream_he_caps(struct mt7915_phy *phy) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 74 | } |
| 75 | } |
| 76 | |
| 77 | +#ifdef CONFIG_MTK_VENDOR |
| 78 | +static int mt7915_unregister_features(struct mt7915_phy *phy) |
| 79 | +{ |
| 80 | + struct csi_data *c, *tmp_c; |
| 81 | + |
| 82 | + spin_lock_bh(&phy->csi.csi_lock); |
| 83 | + phy->csi.enable = 0; |
| 84 | + |
| 85 | + list_for_each_entry_safe(c, tmp_c, &phy->csi.csi_list, node) { |
| 86 | + list_del(&c->node); |
| 87 | + kfree(c); |
| 88 | + } |
| 89 | + spin_unlock_bh(&phy->csi.csi_lock); |
| 90 | + |
| 91 | + |
| 92 | + return 0; |
| 93 | +} |
| 94 | +#endif |
| 95 | + |
| 96 | static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) |
| 97 | { |
| 98 | struct mt7915_phy *phy = mt7915_ext_phy(dev); |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 99 | @@ -1175,6 +1200,10 @@ static void mt7915_unregister_ext_phy(struct mt7915_dev *dev) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 100 | if (!phy) |
| 101 | return; |
| 102 | |
| 103 | +#ifdef CONFIG_MTK_VENDOR |
| 104 | + mt7915_unregister_features(phy); |
| 105 | +#endif |
| 106 | + |
| 107 | mt7915_unregister_thermal(phy); |
| 108 | mt76_unregister_phy(mphy); |
| 109 | ieee80211_free_hw(mphy->hw); |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 110 | @@ -1187,6 +1216,10 @@ static void mt7915_stop_hardware(struct mt7915_dev *dev) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 111 | mt7915_dma_cleanup(dev); |
| 112 | tasklet_disable(&dev->irq_tasklet); |
| 113 | |
| 114 | +#ifdef CONFIG_MTK_VENDOR |
| 115 | + mt7915_unregister_features(&dev->phy); |
| 116 | +#endif |
| 117 | + |
| 118 | if (is_mt7986(&dev->mt76)) |
| 119 | mt7986_wmac_disable(dev); |
| 120 | } |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 121 | @@ -1229,6 +1262,12 @@ int mt7915_register_device(struct mt7915_dev *dev) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 122 | dev->mt76.test_ops = &mt7915_testmode_ops; |
| 123 | #endif |
| 124 | |
| 125 | +#ifdef CONFIG_MTK_VENDOR |
| 126 | + INIT_LIST_HEAD(&dev->phy.csi.csi_list); |
| 127 | + spin_lock_init(&dev->phy.csi.csi_lock); |
| 128 | + mt7915_vendor_register(&dev->phy); |
| 129 | +#endif |
| 130 | + |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 131 | ret = mt76_register_device(&dev->mt76, true, mt76_rates, |
| 132 | ARRAY_SIZE(mt76_rates)); |
| 133 | if (ret) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 134 | diff --git a/mt7915/mcu.c b/mt7915/mcu.c |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 135 | index ec1b0e14..82cff6d3 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 136 | --- a/mt7915/mcu.c |
| 137 | +++ b/mt7915/mcu.c |
developer | c923344 | 2023-04-04 06:06:17 +0800 | [diff] [blame] | 138 | @@ -37,6 +37,10 @@ static bool sr_scene_detect = true; |
developer | 144824b | 2022-11-25 21:27:43 +0800 | [diff] [blame] | 139 | module_param(sr_scene_detect, bool, 0644); |
| 140 | MODULE_PARM_DESC(sr_scene_detect, "Enable firmware scene detection algorithm"); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 141 | |
| 142 | +#ifdef CONFIG_MTK_VENDOR |
| 143 | +static int mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb); |
| 144 | +#endif |
| 145 | + |
| 146 | static u8 |
| 147 | mt7915_mcu_get_sta_nss(u16 mcs_map) |
| 148 | { |
developer | c923344 | 2023-04-04 06:06:17 +0800 | [diff] [blame] | 149 | @@ -372,6 +376,11 @@ mt7915_mcu_rx_ext_event(struct mt7915_dev *dev, struct sk_buff *skb) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 150 | case MCU_EXT_EVENT_FW_LOG_2_HOST: |
| 151 | mt7915_mcu_rx_log_message(dev, skb); |
| 152 | break; |
| 153 | +#ifdef CONFIG_MTK_VENDOR |
| 154 | + case MCU_EXT_EVENT_CSI_REPORT: |
| 155 | + mt7915_mcu_report_csi(dev, skb); |
| 156 | + break; |
| 157 | +#endif |
| 158 | case MCU_EXT_EVENT_BCC_NOTIFY: |
| 159 | mt7915_mcu_rx_bcc_notify(dev, skb); |
| 160 | break; |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 161 | @@ -3951,6 +3960,108 @@ int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev, |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 162 | &req, sizeof(req), true); |
| 163 | } |
| 164 | |
| 165 | +#ifdef CONFIG_MTK_VENDOR |
| 166 | +int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, |
| 167 | + u8 cfg, u8 v1, u32 v2, u8 *mac_addr) |
| 168 | +{ |
| 169 | + struct mt7915_dev *dev = phy->dev; |
| 170 | + struct mt7915_mcu_csi req = { |
| 171 | + .band = phy != &dev->phy, |
| 172 | + .mode = mode, |
| 173 | + .cfg = cfg, |
| 174 | + .v1 = v1, |
| 175 | + .v2 = cpu_to_le32(v2), |
| 176 | + }; |
| 177 | + |
| 178 | + if (is_valid_ether_addr(mac_addr)) |
| 179 | + ether_addr_copy(req.mac_addr, mac_addr); |
| 180 | + |
| 181 | + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD(CSI_CTRL), &req, |
| 182 | + sizeof(req), false); |
| 183 | +} |
| 184 | + |
| 185 | +static int |
| 186 | +mt7915_mcu_report_csi(struct mt7915_dev *dev, struct sk_buff *skb) |
| 187 | +{ |
developer | f64861f | 2022-06-22 11:44:53 +0800 | [diff] [blame] | 188 | + struct mt76_connac2_mcu_rxd *rxd = (struct mt76_connac2_mcu_rxd *)skb->data; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 189 | + struct mt7915_phy *phy = &dev->phy; |
| 190 | + struct mt7915_mcu_csi_report *cr; |
| 191 | + struct csi_data *csi; |
| 192 | + int len, i; |
| 193 | + |
developer | f64861f | 2022-06-22 11:44:53 +0800 | [diff] [blame] | 194 | + skb_pull(skb, sizeof(struct mt76_connac2_mcu_rxd)); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 195 | + |
developer | f64861f | 2022-06-22 11:44:53 +0800 | [diff] [blame] | 196 | + len = le16_to_cpu(rxd->len) - sizeof(struct mt76_connac2_mcu_rxd) + 24; |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 197 | + if (len < sizeof(*cr)) |
| 198 | + return -EINVAL; |
| 199 | + |
| 200 | + cr = (struct mt7915_mcu_csi_report *)skb->data; |
| 201 | + |
| 202 | + if (phy->csi.interval && |
| 203 | + le32_to_cpu(cr->ts) < phy->csi.last_record + phy->csi.interval) |
| 204 | + return 0; |
| 205 | + |
| 206 | + csi = kzalloc(sizeof(*csi), GFP_KERNEL); |
| 207 | + if (!csi) |
| 208 | + return -ENOMEM; |
| 209 | + |
| 210 | +#define SET_CSI_DATA(_field) csi->_field = le32_to_cpu(cr->_field) |
| 211 | + SET_CSI_DATA(ch_bw); |
| 212 | + SET_CSI_DATA(rssi); |
| 213 | + SET_CSI_DATA(snr); |
| 214 | + SET_CSI_DATA(data_num); |
| 215 | + SET_CSI_DATA(data_bw); |
| 216 | + SET_CSI_DATA(pri_ch_idx); |
| 217 | + SET_CSI_DATA(info); |
| 218 | + SET_CSI_DATA(rx_mode); |
| 219 | + SET_CSI_DATA(h_idx); |
| 220 | + SET_CSI_DATA(ts); |
| 221 | + |
| 222 | + SET_CSI_DATA(band); |
developer | eb6a018 | 2022-12-12 18:53:32 +0800 | [diff] [blame] | 223 | + if (csi->band && !phy->mt76->band_idx) |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 224 | + phy = mt7915_ext_phy(dev); |
| 225 | +#undef SET_CSI_DATA |
| 226 | + |
| 227 | + for (i = 0; i < csi->data_num; i++) { |
| 228 | + csi->data_i[i] = le16_to_cpu(cr->data_i[i]); |
| 229 | + csi->data_q[i] = le16_to_cpu(cr->data_q[i]); |
| 230 | + } |
| 231 | + |
| 232 | + memcpy(csi->ta, cr->ta, ETH_ALEN); |
| 233 | + csi->tx_idx = le32_get_bits(cr->trx_idx, GENMASK(31, 16)); |
| 234 | + csi->rx_idx = le32_get_bits(cr->trx_idx, GENMASK(15, 0)); |
| 235 | + |
| 236 | + INIT_LIST_HEAD(&csi->node); |
| 237 | + spin_lock_bh(&phy->csi.csi_lock); |
| 238 | + |
| 239 | + if (!phy->csi.enable) { |
| 240 | + kfree(csi); |
| 241 | + spin_unlock_bh(&phy->csi.csi_lock); |
| 242 | + return 0; |
| 243 | + } |
| 244 | + |
| 245 | + list_add_tail(&csi->node, &phy->csi.csi_list); |
| 246 | + phy->csi.count++; |
| 247 | + |
| 248 | + if (phy->csi.count > CSI_MAX_BUF_NUM) { |
| 249 | + struct csi_data *old; |
| 250 | + |
| 251 | + old = list_first_entry(&phy->csi.csi_list, |
| 252 | + struct csi_data, node); |
| 253 | + |
| 254 | + list_del(&old->node); |
| 255 | + kfree(old); |
| 256 | + phy->csi.count--; |
| 257 | + } |
| 258 | + |
| 259 | + if (csi->h_idx & BIT(15)) /* last chain */ |
| 260 | + phy->csi.last_record = csi->ts; |
| 261 | + spin_unlock_bh(&phy->csi.csi_lock); |
| 262 | + |
| 263 | + return 0; |
| 264 | +} |
| 265 | +#endif |
| 266 | + |
| 267 | #ifdef MTK_DEBUG |
| 268 | int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp) |
| 269 | { |
| 270 | diff --git a/mt7915/mcu.h b/mt7915/mcu.h |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 271 | index 9b07d5d5..9a6a52a4 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 272 | --- a/mt7915/mcu.h |
| 273 | +++ b/mt7915/mcu.h |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 274 | @@ -570,4 +570,81 @@ mt7915_get_power_bound(struct mt7915_phy *phy, s8 txpower) |
| 275 | enum { |
| 276 | MCU_GET_TX_RATE = 4 |
| 277 | }; |
| 278 | + |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 279 | +#ifdef CONFIG_MTK_VENDOR |
| 280 | +struct mt7915_mcu_csi { |
| 281 | + u8 band; |
| 282 | + u8 mode; |
| 283 | + u8 cfg; |
| 284 | + u8 v1; |
| 285 | + __le32 v2; |
| 286 | + u8 mac_addr[ETH_ALEN]; |
| 287 | + u8 _rsv[34]; |
| 288 | +} __packed; |
| 289 | + |
| 290 | +struct csi_tlv { |
| 291 | + __le32 tag; |
| 292 | + __le32 len; |
| 293 | +} __packed; |
| 294 | + |
| 295 | +#define CSI_MAX_COUNT 256 |
| 296 | +#define CSI_MAX_BUF_NUM 3000 |
| 297 | + |
| 298 | +struct mt7915_mcu_csi_report { |
| 299 | + struct csi_tlv _t0; |
| 300 | + __le32 ver; |
| 301 | + struct csi_tlv _t1; |
| 302 | + __le32 ch_bw; |
| 303 | + struct csi_tlv _t2; |
| 304 | + __le32 rssi; |
| 305 | + struct csi_tlv _t3; |
| 306 | + __le32 snr; |
| 307 | + struct csi_tlv _t4; |
| 308 | + __le32 band; |
| 309 | + struct csi_tlv _t5; |
| 310 | + __le32 data_num; |
| 311 | + struct csi_tlv _t6; |
| 312 | + __le16 data_i[CSI_MAX_COUNT]; |
| 313 | + struct csi_tlv _t7; |
| 314 | + __le16 data_q[CSI_MAX_COUNT]; |
| 315 | + struct csi_tlv _t8; |
| 316 | + __le32 data_bw; |
| 317 | + struct csi_tlv _t9; |
| 318 | + __le32 pri_ch_idx; |
| 319 | + struct csi_tlv _t10; |
| 320 | + u8 ta[8]; |
| 321 | + struct csi_tlv _t11; |
| 322 | + __le32 info; |
| 323 | + struct csi_tlv _t12; |
| 324 | + __le32 rx_mode; |
| 325 | + struct csi_tlv _t17; |
| 326 | + __le32 h_idx; |
| 327 | + struct csi_tlv _t18; |
| 328 | + __le32 trx_idx; |
| 329 | + struct csi_tlv _t19; |
| 330 | + __le32 ts; |
| 331 | +} __packed; |
| 332 | + |
| 333 | +struct csi_data { |
| 334 | + u8 ch_bw; |
| 335 | + u16 data_num; |
| 336 | + s16 data_i[CSI_MAX_COUNT]; |
| 337 | + s16 data_q[CSI_MAX_COUNT]; |
| 338 | + u8 band; |
| 339 | + s8 rssi; |
| 340 | + u8 snr; |
| 341 | + u32 ts; |
| 342 | + u8 data_bw; |
| 343 | + u8 pri_ch_idx; |
| 344 | + u8 ta[ETH_ALEN]; |
| 345 | + u32 info; |
| 346 | + u8 rx_mode; |
| 347 | + u32 h_idx; |
| 348 | + u16 tx_idx; |
| 349 | + u16 rx_idx; |
| 350 | + |
| 351 | + struct list_head node; |
| 352 | +}; |
| 353 | +#endif |
| 354 | + |
| 355 | #endif |
| 356 | diff --git a/mt7915/mt7915.h b/mt7915/mt7915.h |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 357 | index a7525f33..e02dcd03 100644 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 358 | --- a/mt7915/mt7915.h |
| 359 | +++ b/mt7915/mt7915.h |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 360 | @@ -299,6 +299,20 @@ struct mt7915_phy { |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 361 | u8 spe_idx; |
| 362 | } test; |
| 363 | #endif |
| 364 | + |
| 365 | +#ifdef CONFIG_MTK_VENDOR |
| 366 | + struct { |
| 367 | + struct list_head csi_list; |
| 368 | + spinlock_t csi_lock; |
| 369 | + u32 count; |
| 370 | + bool mask; |
| 371 | + bool reorder; |
| 372 | + bool enable; |
| 373 | + |
| 374 | + u32 interval; |
| 375 | + u32 last_record; |
| 376 | + } csi; |
| 377 | +#endif |
| 378 | }; |
| 379 | |
| 380 | struct mt7915_dev { |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 381 | @@ -683,6 +697,12 @@ void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif, |
developer | c226de8 | 2022-10-03 12:24:57 +0800 | [diff] [blame] | 382 | int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr, |
| 383 | bool pci, int *irq); |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 384 | |
| 385 | +#ifdef CONFIG_MTK_VENDOR |
| 386 | +void mt7915_vendor_register(struct mt7915_phy *phy); |
| 387 | +int mt7915_mcu_set_csi(struct mt7915_phy *phy, u8 mode, |
| 388 | + u8 cfg, u8 v1, u32 v2, u8 *mac_addr); |
| 389 | +#endif |
| 390 | + |
| 391 | #ifdef MTK_DEBUG |
| 392 | int mt7915_mtk_init_debugfs(struct mt7915_phy *phy, struct dentry *dir); |
| 393 | int mt7915_dbg_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3, bool wait_resp); |
| 394 | diff --git a/mt7915/vendor.c b/mt7915/vendor.c |
| 395 | new file mode 100644 |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 396 | index 00000000..98fd9c2d |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 397 | --- /dev/null |
| 398 | +++ b/mt7915/vendor.c |
| 399 | @@ -0,0 +1,452 @@ |
| 400 | +// SPDX-License-Identifier: ISC |
| 401 | +/* |
| 402 | + * Copyright (C) 2020, MediaTek Inc. All rights reserved. |
| 403 | + */ |
| 404 | + |
| 405 | +#include <net/netlink.h> |
| 406 | + |
| 407 | +#include "mt7915.h" |
| 408 | +#include "mcu.h" |
| 409 | +#include "vendor.h" |
| 410 | + |
| 411 | +static const struct nla_policy |
| 412 | +csi_ctrl_policy[NUM_MTK_VENDOR_ATTRS_CSI_CTRL] = { |
| 413 | + [MTK_VENDOR_ATTR_CSI_CTRL_CFG] = {.type = NLA_NESTED }, |
| 414 | + [MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE] = { .type = NLA_U8 }, |
| 415 | + [MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE] = { .type = NLA_U8 }, |
| 416 | + [MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1] = { .type = NLA_U8 }, |
| 417 | + [MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2] = { .type = NLA_U8 }, |
| 418 | + [MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR] = { .type = NLA_NESTED }, |
| 419 | + [MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL] = { .type = NLA_U32 }, |
| 420 | + [MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM] = { .type = NLA_U16 }, |
| 421 | + [MTK_VENDOR_ATTR_CSI_CTRL_DATA] = { .type = NLA_NESTED }, |
| 422 | +}; |
| 423 | + |
| 424 | +struct csi_null_tone { |
| 425 | + u8 start; |
| 426 | + u8 end; |
| 427 | +}; |
| 428 | + |
| 429 | +struct csi_reorder{ |
| 430 | + u8 dest; |
| 431 | + u8 start; |
| 432 | + u8 end; |
| 433 | +}; |
| 434 | + |
| 435 | +struct csi_mask { |
| 436 | + struct csi_null_tone null[10]; |
| 437 | + u8 pilot[8]; |
| 438 | + struct csi_reorder ro[3]; |
| 439 | +}; |
| 440 | + |
| 441 | +static const struct csi_mask csi_mask_groups[] = { |
| 442 | + /* OFDM */ |
| 443 | + { .null = { { 0 }, { 27, 37 } }, |
| 444 | + .ro = { {0, 0, 63} }, |
| 445 | + }, |
| 446 | + { .null = { { 0, 69 }, { 96 }, { 123, 127 } }, |
| 447 | + .ro = { { 0, 96 }, { 38, 70, 95 }, { 1, 97, 122 } }, |
| 448 | + }, |
| 449 | + { .null = { { 0, 5 }, { 32 }, { 59, 127 } }, |
| 450 | + .ro = { { 0, 32 }, { 38, 6, 31 }, { 1, 33, 58 } }, |
| 451 | + }, |
| 452 | + { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 127 } }, |
| 453 | + .ro = { { 0, 0, 127 } }, |
| 454 | + }, |
| 455 | + { .null = { { 0, 133 }, { 160 }, { 187, 255 } }, |
| 456 | + .ro = { { 0, 160 }, { 1, 161, 186 }, { 38, 134, 159 } }, |
| 457 | + }, |
| 458 | + { .null = { { 0, 197 }, { 224 }, { 251, 255 } }, |
| 459 | + .ro = { { 0, 224 }, { 1, 225, 250 }, { 38, 198, 223 } }, |
| 460 | + }, |
| 461 | + { .null = { { 0, 5 }, { 32 }, { 59, 255 } }, |
| 462 | + .ro = { { 0, 32 }, { 1, 33, 58 }, { 38, 6, 31 } }, |
| 463 | + }, |
| 464 | + { .null = { { 0, 69 }, { 96 }, { 123, 255 } }, |
| 465 | + .ro = { { 0, 96 }, { 1, 97, 122 }, { 38, 70, 95 } }, |
| 466 | + }, |
| 467 | + { .null = { { 0, 133 }, { 160 }, { 187, 197 }, { 224 }, { 251, 255 } }, |
| 468 | + .ro = { { 0, 192 }, { 2, 198, 250 }, { 74, 134, 186 } }, |
| 469 | + }, |
| 470 | + { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 255 } }, |
| 471 | + .ro = { { 0, 64 }, { 2, 70, 122 }, { 74, 6, 58 } }, |
| 472 | + }, |
| 473 | + { .null = { { 0, 5 }, { 32 }, { 59, 69 }, { 96 }, { 123, 133 }, |
| 474 | + { 160 }, { 187, 197 }, { 224 }, { 251, 255 } }, |
| 475 | + .ro = { { 0, 0, 255 } }, |
| 476 | + }, |
| 477 | + |
| 478 | + /* HT/VHT */ |
| 479 | + { .null = { { 0 }, { 29, 35 } }, |
| 480 | + .pilot = { 7, 21, 43, 57 }, |
| 481 | + .ro = { { 0, 0, 63 } }, |
| 482 | + }, |
| 483 | + { .null = { { 0, 67 }, { 96 }, { 125, 127 } }, |
| 484 | + .pilot = { 75, 89, 103, 117 }, |
| 485 | + .ro = { { 0, 96 }, { 36, 68, 95 }, { 1, 97, 124 } }, |
| 486 | + }, |
| 487 | + { .null = { { 0, 3 }, { 32 }, { 61, 127 } }, |
| 488 | + .pilot = { 11, 25, 39, 53 }, |
| 489 | + .ro = { { 0, 32 }, { 36, 4, 31 }, { 1, 33, 60 } }, |
| 490 | + }, |
| 491 | + { .null = { { 0, 1 }, { 59, 69 }, { 127 } }, |
| 492 | + .pilot = { 11, 25, 53, 75, 103, 117 }, |
| 493 | + .ro = { { 0, 0, 127 } }, |
| 494 | + }, |
| 495 | + { .null = { { 0, 131 }, { 160 }, { 189, 255 } }, |
| 496 | + .pilot = { 139, 153, 167, 181 }, |
| 497 | + .ro = { { 0, 160 }, { 1, 161, 188 }, { 36, 132, 159 } }, |
| 498 | + }, |
| 499 | + { .null = { { 0, 195 }, { 224 }, { 253 }, { 255 } }, |
| 500 | + .pilot = { 203, 217, 231, 245 }, |
| 501 | + .ro = { { 0, 224 }, { 1, 225, 252 }, { 36, 196, 223 } }, |
| 502 | + }, |
| 503 | + { .null = { { 0, 3 }, { 32 }, { 61, 255 } }, |
| 504 | + .pilot = { 11, 25, 39, 53 }, |
| 505 | + .ro = { { 0, 32 }, { 1, 33, 60 }, { 36, 4, 31 } }, |
| 506 | + }, |
| 507 | + { .null = { { 0, 67 }, { 96 }, { 125, 255 } }, |
| 508 | + .pilot = { 75, 89, 103, 117 }, |
| 509 | + .ro = { { 0, 96 }, { 1, 97, 124 }, { 36, 68, 95 } }, |
| 510 | + }, |
| 511 | + { .null = { { 0, 133 }, { 191, 193 }, { 251, 255 } }, |
| 512 | + .pilot = { 139, 167, 181, 203, 217, 245 }, |
| 513 | + .ro = { { 0, 192 }, { 2, 194, 250 }, { 70, 134, 190 } }, |
| 514 | + }, |
| 515 | + { .null = { { 0, 5 }, { 63, 65 }, { 123, 127 } }, |
| 516 | + .pilot = { 11, 39, 53, 75, 89, 117 }, |
| 517 | + .ro = { { 0, 64 }, { 2, 66, 122 }, { 70, 6, 62 } }, |
| 518 | + }, |
| 519 | + { .null = { { 0, 1 }, { 123, 133 }, { 255 } }, |
| 520 | + .pilot = { 11, 39, 75, 103, 153, 181, 217, 245 }, |
| 521 | + .ro = { { 0, 0, 255 } }, |
| 522 | + }, |
| 523 | + |
| 524 | + /* HE */ |
| 525 | + { .null = { { 0 }, { 31, 33 } }, |
| 526 | + .pilot = { 12, 29, 35, 52 }, |
| 527 | + .ro = { { 0, 0, 63 } }, |
| 528 | + }, |
| 529 | + { .null = { { 30, 34 }, { 96 } }, |
| 530 | + .pilot = { 4, 21, 43, 60, 70, 87, 105, 122 }, |
| 531 | + .ro = { { 0, 96 }, { 34, 66, 95 }, { 1, 97, 126 } }, |
| 532 | + }, |
| 533 | + { .null = { { 32 }, { 94, 98 } }, |
| 534 | + .pilot = { 6, 23, 41, 58, 68, 85, 107, 124 }, |
| 535 | + .ro = { { 0, 32 }, { 34, 2, 31 }, { 1, 31, 62 } }, |
| 536 | + }, |
| 537 | + { .null = { { 0 }, { 62, 66 } }, |
| 538 | + .pilot = { 9, 26, 36, 53, 75, 92, 102, 119 }, |
| 539 | + .ro = { { 0, 0, 127 } }, |
| 540 | + }, |
| 541 | + { .null = { { 30, 34 }, { 160 } }, |
| 542 | + .pilot = { 4, 21, 43, 60, 137, 154, 166, 183 }, |
| 543 | + .ro = { { 0, 160 }, { 1, 161, 190 }, { 34, 130, 159 } }, |
| 544 | + }, |
| 545 | + { .null = { { 94, 98 }, { 224 } }, |
| 546 | + .pilot = { 68, 85, 107, 124, 201, 218, 230, 247 }, |
| 547 | + .ro = { { 0, 224 }, { 1, 225, 254 }, { 34, 194, 223 } }, |
| 548 | + }, |
| 549 | + { .null = { { 32 }, { 158, 162 } }, |
| 550 | + .pilot = { 9, 26, 38, 55, 132, 149, 171, 188 }, |
| 551 | + .ro = { { 0, 32 }, { 1, 33, 62 }, { 34, 2, 31 } }, |
| 552 | + }, |
| 553 | + { .null = { { 96 }, { 222, 226 } }, |
| 554 | + .pilot = { 73, 90, 102, 119, 196, 213, 235, 252 }, |
| 555 | + .ro = { { 0, 96 }, { 1, 97, 126 }, { 34, 66, 95 } }, |
| 556 | + }, |
| 557 | + { .null = { { 62, 66 }, { 192 } }, |
| 558 | + .pilot = { 36, 53, 75, 92, 169, 186, 198, 215 }, |
| 559 | + .ro = { { 0, 192 }, { 1, 193, 253 }, { 67, 131, 191 } }, |
| 560 | + }, |
| 561 | + { .null = { { 64 }, { 190, 194 } }, |
| 562 | + .pilot = { 41, 58, 70, 87, 164, 181, 203, 220 }, |
| 563 | + .ro = { { 0, 64 }, { 1, 65, 125 }, { 67, 3, 63 } }, |
| 564 | + }, |
| 565 | + { .null = { { 0 }, { 126, 130 } }, |
| 566 | + .pilot = { 6, 23, 100, 117, 139, 156, 233, 250 }, |
| 567 | + .ro = { { 0, 0, 255 } }, |
| 568 | + }, |
| 569 | +}; |
| 570 | + |
| 571 | +static inline u8 csi_group_idx(u8 mode, u8 ch_bw, u8 data_bw, u8 pri_ch_idx) |
| 572 | +{ |
| 573 | + if (ch_bw < 2 || data_bw < 1) |
| 574 | + return mode * 11 + ch_bw * ch_bw + pri_ch_idx; |
| 575 | + else |
| 576 | + return mode * 11 + ch_bw * ch_bw + (data_bw + 1) * 2 + pri_ch_idx; |
| 577 | +} |
| 578 | + |
| 579 | +static int mt7915_vendor_csi_ctrl(struct wiphy *wiphy, |
| 580 | + struct wireless_dev *wdev, |
| 581 | + const void *data, |
| 582 | + int data_len) |
| 583 | +{ |
| 584 | + struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
| 585 | + struct mt7915_phy *phy = mt7915_hw_phy(hw); |
| 586 | + struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_CSI_CTRL]; |
| 587 | + int err; |
| 588 | + |
| 589 | + err = nla_parse(tb, MTK_VENDOR_ATTR_CSI_CTRL_MAX, data, data_len, |
| 590 | + csi_ctrl_policy, NULL); |
| 591 | + if (err) |
| 592 | + return err; |
| 593 | + |
| 594 | + if (tb[MTK_VENDOR_ATTR_CSI_CTRL_CFG]) { |
| 595 | + u8 mode = 0, type = 0, v1 = 0, v2 = 0; |
| 596 | + u8 mac_addr[ETH_ALEN] = {}; |
| 597 | + struct nlattr *cur; |
| 598 | + int rem; |
| 599 | + |
| 600 | + nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_CSI_CTRL_CFG], rem) { |
| 601 | + switch(nla_type(cur)) { |
| 602 | + case MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE: |
| 603 | + mode = nla_get_u8(cur); |
| 604 | + break; |
| 605 | + case MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE: |
| 606 | + type = nla_get_u8(cur); |
| 607 | + break; |
| 608 | + case MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1: |
| 609 | + v1 = nla_get_u8(cur); |
| 610 | + break; |
| 611 | + case MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2: |
| 612 | + v2 = nla_get_u8(cur); |
| 613 | + break; |
| 614 | + default: |
| 615 | + return -EINVAL; |
| 616 | + }; |
| 617 | + } |
| 618 | + |
| 619 | + if (tb[MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR]) { |
| 620 | + int idx = 0; |
| 621 | + |
| 622 | + nla_for_each_nested(cur, tb[MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR], rem) { |
| 623 | + mac_addr[idx++] = nla_get_u8(cur); |
| 624 | + } |
| 625 | + } |
| 626 | + |
| 627 | + mt7915_mcu_set_csi(phy, mode, type, v1, v2, mac_addr); |
| 628 | + |
| 629 | + spin_lock_bh(&phy->csi.csi_lock); |
| 630 | + |
| 631 | + phy->csi.enable = !!mode; |
| 632 | + |
| 633 | + if (mode == 2 && type == 5) { |
| 634 | + if (v1 >= 1) |
| 635 | + phy->csi.mask = 1; |
| 636 | + if (v1 == 2) |
| 637 | + phy->csi.reorder = 1; |
| 638 | + } |
| 639 | + |
| 640 | + /* clean up old csi stats */ |
| 641 | + if ((mode == 0 || mode == 2) && !list_empty(&phy->csi.csi_list)) { |
| 642 | + struct csi_data *c, *tmp_c; |
| 643 | + |
| 644 | + list_for_each_entry_safe(c, tmp_c, &phy->csi.csi_list, |
| 645 | + node) { |
| 646 | + list_del(&c->node); |
| 647 | + kfree(c); |
| 648 | + phy->csi.count--; |
| 649 | + } |
| 650 | + } else if (mode == 1) { |
| 651 | + phy->csi.last_record = 0; |
| 652 | + } |
| 653 | + |
| 654 | + spin_unlock_bh(&phy->csi.csi_lock); |
| 655 | + } |
| 656 | + |
| 657 | + if (tb[MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL]) |
| 658 | + phy->csi.interval = nla_get_u32(tb[MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL]); |
| 659 | + |
| 660 | + return 0; |
| 661 | +} |
| 662 | + |
| 663 | +static void |
| 664 | +mt7915_vendor_csi_tone_mask(struct mt7915_phy *phy, struct csi_data *csi) |
| 665 | +{ |
| 666 | + static const u8 mode_map[] = { |
| 667 | + [MT_PHY_TYPE_OFDM] = 0, |
| 668 | + [MT_PHY_TYPE_HT] = 1, |
| 669 | + [MT_PHY_TYPE_VHT] = 1, |
| 670 | + [MT_PHY_TYPE_HE_SU] = 2, |
| 671 | + }; |
| 672 | + const struct csi_mask *cmask; |
| 673 | + int i; |
| 674 | + |
| 675 | + if (csi->rx_mode == MT_PHY_TYPE_CCK || !phy->csi.mask) |
| 676 | + return; |
| 677 | + |
| 678 | + if (csi->data_bw == IEEE80211_STA_RX_BW_40) |
| 679 | + csi->pri_ch_idx /= 2; |
| 680 | + |
| 681 | + cmask = &csi_mask_groups[csi_group_idx(mode_map[csi->rx_mode], |
| 682 | + csi->ch_bw, |
| 683 | + csi->data_bw, |
| 684 | + csi->pri_ch_idx)]; |
| 685 | + |
| 686 | + for (i = 0; i < 10; i++) { |
| 687 | + const struct csi_null_tone *ntone = &cmask->null[i]; |
| 688 | + u8 start = ntone->start; |
| 689 | + u8 end = ntone->end; |
| 690 | + int j; |
| 691 | + |
| 692 | + if (!start && !end && i > 0) |
| 693 | + break; |
| 694 | + |
| 695 | + if (!end) |
| 696 | + end = start; |
| 697 | + |
| 698 | + for (j = start; j <= end; j++) { |
| 699 | + csi->data_i[j] = 0; |
| 700 | + csi->data_q[j] = 0; |
| 701 | + } |
| 702 | + } |
| 703 | + |
| 704 | + for (i = 0; i < 8; i++) { |
| 705 | + u8 pilot = cmask->pilot[i]; |
| 706 | + |
| 707 | + if (!pilot) |
| 708 | + break; |
| 709 | + |
| 710 | + csi->data_i[pilot] = 0; |
| 711 | + csi->data_q[pilot] = 0; |
| 712 | + } |
| 713 | + |
| 714 | + if (!phy->csi.reorder) |
| 715 | + return; |
| 716 | + |
| 717 | + for (i = 0; i < 3; i++) { |
| 718 | + const struct csi_reorder *ro = &cmask->ro[i]; |
| 719 | + u8 dest = ro->dest; |
| 720 | + u8 start = ro->start; |
| 721 | + u8 end = ro->end; |
| 722 | + |
| 723 | + if (!dest && !start && !end) |
| 724 | + break; |
| 725 | + |
| 726 | + if (dest == start) |
| 727 | + continue; |
| 728 | + |
| 729 | + if (end) { |
| 730 | + memmove(&csi->data_i[dest], &csi->data_i[start], |
| 731 | + end - start + 1); |
| 732 | + memmove(&csi->data_q[dest], &csi->data_q[start], |
| 733 | + end - start + 1); |
| 734 | + } else { |
| 735 | + csi->data_i[dest] = csi->data_i[start]; |
| 736 | + csi->data_q[dest] = csi->data_q[start]; |
| 737 | + } |
| 738 | + } |
| 739 | +} |
| 740 | + |
| 741 | +static int |
| 742 | +mt7915_vendor_csi_ctrl_dump(struct wiphy *wiphy, struct wireless_dev *wdev, |
| 743 | + struct sk_buff *skb, const void *data, int data_len, |
| 744 | + unsigned long *storage) |
| 745 | +{ |
| 746 | +#define RESERVED_SET BIT(31) |
| 747 | + struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); |
| 748 | + struct mt7915_phy *phy = mt7915_hw_phy(hw); |
| 749 | + struct nlattr *tb[NUM_MTK_VENDOR_ATTRS_CSI_CTRL]; |
| 750 | + int err = 0; |
| 751 | + |
| 752 | + if (*storage & RESERVED_SET) { |
| 753 | + if ((*storage & GENMASK(15, 0)) == 0) |
| 754 | + return -ENOENT; |
| 755 | + (*storage)--; |
| 756 | + } |
| 757 | + |
| 758 | + if (data) { |
| 759 | + err = nla_parse(tb, MTK_VENDOR_ATTR_CSI_CTRL_MAX, data, data_len, |
| 760 | + csi_ctrl_policy, NULL); |
| 761 | + if (err) |
| 762 | + return err; |
| 763 | + } |
| 764 | + |
| 765 | + if (!(*storage & RESERVED_SET) && tb[MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM]) { |
| 766 | + *storage = nla_get_u16(tb[MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM]); |
| 767 | + *storage |= RESERVED_SET; |
| 768 | + } |
| 769 | + |
| 770 | + spin_lock_bh(&phy->csi.csi_lock); |
| 771 | + |
| 772 | + if (!list_empty(&phy->csi.csi_list)) { |
| 773 | + struct csi_data *csi; |
| 774 | + void *a, *b; |
| 775 | + int i; |
| 776 | + |
| 777 | + csi = list_first_entry(&phy->csi.csi_list, struct csi_data, node); |
| 778 | + |
| 779 | + mt7915_vendor_csi_tone_mask(phy, csi); |
| 780 | + |
| 781 | + a = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_CTRL_DATA); |
| 782 | + |
| 783 | + if (nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_VER, 1) || |
| 784 | + nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_RSSI, csi->rssi) || |
| 785 | + nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_SNR, csi->snr) || |
| 786 | + nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_BW, csi->data_bw) || |
| 787 | + nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_CH_IDX, csi->pri_ch_idx) || |
| 788 | + nla_put_u8(skb, MTK_VENDOR_ATTR_CSI_DATA_MODE, csi->rx_mode)) |
| 789 | + goto out; |
| 790 | + |
| 791 | + if (nla_put_u16(skb, MTK_VENDOR_ATTR_CSI_DATA_TX_ANT, csi->tx_idx) || |
| 792 | + nla_put_u16(skb, MTK_VENDOR_ATTR_CSI_DATA_RX_ANT, csi->rx_idx)) |
| 793 | + goto out; |
| 794 | + |
| 795 | + if (nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_INFO, csi->info) || |
| 796 | + nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_H_IDX, csi->h_idx) || |
| 797 | + nla_put_u32(skb, MTK_VENDOR_ATTR_CSI_DATA_TS, csi->ts)) |
| 798 | + goto out; |
| 799 | + |
| 800 | + b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_TA); |
| 801 | + for (i = 0; i < ARRAY_SIZE(csi->ta); i++) |
| 802 | + if (nla_put_u8(skb, i, csi->ta[i])) |
| 803 | + goto out; |
| 804 | + nla_nest_end(skb, b); |
| 805 | + |
| 806 | + b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_I); |
| 807 | + for (i = 0; i < ARRAY_SIZE(csi->data_i); i++) |
| 808 | + if (nla_put_u16(skb, i, csi->data_i[i])) |
| 809 | + goto out; |
| 810 | + nla_nest_end(skb, b); |
| 811 | + |
| 812 | + b = nla_nest_start(skb, MTK_VENDOR_ATTR_CSI_DATA_Q); |
| 813 | + for (i = 0; i < ARRAY_SIZE(csi->data_q); i++) |
| 814 | + if (nla_put_u16(skb, i, csi->data_q[i])) |
| 815 | + goto out; |
| 816 | + nla_nest_end(skb, b); |
| 817 | + |
| 818 | + nla_nest_end(skb, a); |
| 819 | + |
| 820 | + list_del(&csi->node); |
| 821 | + kfree(csi); |
| 822 | + phy->csi.count--; |
| 823 | + |
| 824 | + err = phy->csi.count; |
| 825 | + } |
| 826 | +out: |
| 827 | + spin_unlock_bh(&phy->csi.csi_lock); |
| 828 | + |
| 829 | + return err; |
| 830 | +} |
| 831 | + |
| 832 | +static const struct wiphy_vendor_command mt7915_vendor_commands[] = { |
| 833 | + { |
| 834 | + .info = { |
| 835 | + .vendor_id = MTK_NL80211_VENDOR_ID, |
| 836 | + .subcmd = MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL, |
| 837 | + }, |
| 838 | + .flags = WIPHY_VENDOR_CMD_NEED_NETDEV | |
| 839 | + WIPHY_VENDOR_CMD_NEED_RUNNING, |
| 840 | + .doit = mt7915_vendor_csi_ctrl, |
| 841 | + .dumpit = mt7915_vendor_csi_ctrl_dump, |
| 842 | + .policy = csi_ctrl_policy, |
| 843 | + .maxattr = MTK_VENDOR_ATTR_CSI_CTRL_MAX, |
| 844 | + } |
| 845 | +}; |
| 846 | + |
| 847 | +void mt7915_vendor_register(struct mt7915_phy *phy) |
| 848 | +{ |
| 849 | + phy->mt76->hw->wiphy->vendor_commands = mt7915_vendor_commands; |
| 850 | + phy->mt76->hw->wiphy->n_vendor_commands = ARRAY_SIZE(mt7915_vendor_commands); |
| 851 | +} |
| 852 | diff --git a/mt7915/vendor.h b/mt7915/vendor.h |
| 853 | new file mode 100644 |
developer | 5bea732 | 2023-04-13 18:50:55 +0800 | [diff] [blame] | 854 | index 00000000..9d3db2a7 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 855 | --- /dev/null |
| 856 | +++ b/mt7915/vendor.h |
| 857 | @@ -0,0 +1,60 @@ |
| 858 | +#ifndef __MT7915_VENDOR_H |
| 859 | +#define __MT7915_VENDOR_H |
| 860 | + |
| 861 | +#define MTK_NL80211_VENDOR_ID 0x0ce7 |
| 862 | + |
| 863 | +enum mtk_nl80211_vendor_subcmds { |
| 864 | + MTK_NL80211_VENDOR_SUBCMD_CSI_CTRL = 0xc2, |
| 865 | +}; |
| 866 | + |
| 867 | +enum mtk_vendor_attr_csi_ctrl { |
| 868 | + MTK_VENDOR_ATTR_CSI_CTRL_UNSPEC, |
| 869 | + |
| 870 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG, |
| 871 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_MODE, |
| 872 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_TYPE, |
| 873 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL1, |
| 874 | + MTK_VENDOR_ATTR_CSI_CTRL_CFG_VAL2, |
| 875 | + MTK_VENDOR_ATTR_CSI_CTRL_MAC_ADDR, |
| 876 | + MTK_VENDOR_ATTR_CSI_CTRL_INTERVAL, |
| 877 | + |
| 878 | + MTK_VENDOR_ATTR_CSI_CTRL_DUMP_NUM, |
| 879 | + |
| 880 | + MTK_VENDOR_ATTR_CSI_CTRL_DATA, |
| 881 | + |
| 882 | + /* keep last */ |
| 883 | + NUM_MTK_VENDOR_ATTRS_CSI_CTRL, |
| 884 | + MTK_VENDOR_ATTR_CSI_CTRL_MAX = |
| 885 | + NUM_MTK_VENDOR_ATTRS_CSI_CTRL - 1 |
| 886 | +}; |
| 887 | + |
| 888 | +enum mtk_vendor_attr_csi_data { |
| 889 | + MTK_VENDOR_ATTR_CSI_DATA_UNSPEC, |
| 890 | + MTK_VENDOR_ATTR_CSI_DATA_PAD, |
| 891 | + |
| 892 | + MTK_VENDOR_ATTR_CSI_DATA_VER, |
| 893 | + MTK_VENDOR_ATTR_CSI_DATA_TS, |
| 894 | + MTK_VENDOR_ATTR_CSI_DATA_RSSI, |
| 895 | + MTK_VENDOR_ATTR_CSI_DATA_SNR, |
| 896 | + MTK_VENDOR_ATTR_CSI_DATA_BW, |
| 897 | + MTK_VENDOR_ATTR_CSI_DATA_CH_IDX, |
| 898 | + MTK_VENDOR_ATTR_CSI_DATA_TA, |
| 899 | + MTK_VENDOR_ATTR_CSI_DATA_I, |
| 900 | + MTK_VENDOR_ATTR_CSI_DATA_Q, |
| 901 | + MTK_VENDOR_ATTR_CSI_DATA_INFO, |
| 902 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD1, |
| 903 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD2, |
| 904 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD3, |
| 905 | + MTK_VENDOR_ATTR_CSI_DATA_RSVD4, |
| 906 | + MTK_VENDOR_ATTR_CSI_DATA_TX_ANT, |
| 907 | + MTK_VENDOR_ATTR_CSI_DATA_RX_ANT, |
| 908 | + MTK_VENDOR_ATTR_CSI_DATA_MODE, |
| 909 | + MTK_VENDOR_ATTR_CSI_DATA_H_IDX, |
| 910 | + |
| 911 | + /* keep last */ |
| 912 | + NUM_MTK_VENDOR_ATTRS_CSI_DATA, |
| 913 | + MTK_VENDOR_ATTR_CSI_DATA_MAX = |
| 914 | + NUM_MTK_VENDOR_ATTRS_CSI_DATA - 1 |
| 915 | +}; |
| 916 | + |
| 917 | +#endif |
| 918 | -- |
developer | 2324aa2 | 2023-04-12 11:30:15 +0800 | [diff] [blame] | 919 | 2.18.0 |
developer | e2cc0fa | 2022-03-29 17:31:03 +0800 | [diff] [blame] | 920 | |