[][Change PSE default threshold settings]
[Description]
Change PSE default threshold settings:
- Free queue flow control threshold
- Input queue reservation
- Output queue reservation
- GDM threshold
- CDM threshold
[Release-log]
N/A
Change-Id: Ib66f611c6abe2d5a4b3a9ff9fa4dbf9b030adf07
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4647577
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index d02b248..8f152ab 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -108,12 +108,24 @@
/* FE global misc reg*/
#define MTK_FE_GLO_MISC 0x124
+/* PSE Free Queue Flow Control */
+#define PSE_FQFC_CFG1 0x100
+#define PSE_FQFC_CFG2 0x104
+
/* PSE Input Queue Reservation Register*/
#define PSE_IQ_REV(x) (0x140 + ((x - 1) * 0x4))
/* PSE Output Queue Threshold Register*/
#define PSE_OQ_TH(x) (0x160 + ((x - 1) * 0x4))
+/* GDM and CDM Threshold */
+#define MTK_GDM2_THRES 0x1530
+#define MTK_CDMW0_THRES 0x164c
+#define MTK_CDMW1_THRES 0x1650
+#define MTK_CDME0_THRES 0x1654
+#define MTK_CDME1_THRES 0x1658
+#define MTK_CDMM_THRES 0x165c
+
#define MTK_PDMA_V2 BIT(4)
#if defined(CONFIG_MEDIATEK_NETSYS_V2)