| commit | f39022abe7aa758b063910387b3e88021bf924c1 | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Thu May 06 13:31:52 2021 +0800 |
| committer | developer <developer@mediatek.com> | Fri May 07 16:31:49 2021 +0800 |
| tree | 057063759e7bcd6dd93761b6880b988c3b779f23 | |
| parent | 41294e35072372730c17ce1169121103231a7564 [diff] [blame] |
[][MT7986 develop][Fix timer dts node] [Description] Fix wrong timer frequency due to bl2 changed the setting [Release-log] Change-Id: Ie0b0431b35f14edb28dddbef4e55fd061925e2cb Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4511295
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi index 544c028..5c882ea 100644 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi +++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -184,14 +184,14 @@ gpt_clk: dummy_gpt_clk { compatible = "fixed-clock"; - clock-frequency = <20000000>; + clock-frequency = <13000000>; #clock-cells = <0>; }; timer { compatible = "arm,armv8-timer"; interrupt-parent = <&gic>; - clock-frequency = <40000000>; + clock-frequency = <13000000>; interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,