[][openwrt-24][mac80211][hnat][Add hwpath support]
[Description]
Add hwpath support
1. add wed node into 7988 dts
2. add wo fw for mt7988
[Release-log]
Change-Id: Ibd76731c6cd8cf302050484580899849f121450b
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/9720713
diff --git a/autobuild/unified/filogic/mac80211/master/defconfig b/autobuild/unified/filogic/mac80211/master/defconfig
index 852e220..dd22deb 100644
--- a/autobuild/unified/filogic/mac80211/master/defconfig
+++ b/autobuild/unified/filogic/mac80211/master/defconfig
@@ -14,3 +14,4 @@
CONFIG_PACKAGE_iperf3=y
# CONFIG_PACKAGE_iw is not set
CONFIG_PACKAGE_iw-full=y
+CONFIG_PACKAGE_mt7988-wo-firmware=y
diff --git a/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/Makefile b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/Makefile
new file mode 100644
index 0000000..ae564aa
--- /dev/null
+++ b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/Makefile
@@ -0,0 +1,40 @@
+#
+# Copyright (C) 2014 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+PKG_NAME:=mt7988-wo-firmware
+PKG_VERSION:=1.0
+PKG_RELEASE:=1
+
+PKG_MAINTAINER:=Rex Lu <rex.lu@mediatek.com>
+
+include $(INCLUDE_DIR)/package.mk
+
+define Package/mt7988-wo-firmware
+ SECTION:=firmware
+ CATEGORY:=Firmware
+ TITLE:=MT7988 wo firmware
+endef
+
+define Package/mt7988-wo-firmware/description
+ This is a firmware package for MT7988 wo
+endef
+
+define Build/Compile
+
+endef
+
+define Package/mt7988-wo-firmware/install
+ $(INSTALL_DIR) $(1)/lib/firmware/mediatek/
+ $(INSTALL_DATA) \
+ ./files/mt7988_wo_0.bin \
+ ./files/mt7988_wo_1.bin \
+ ./files/mt7988_wo_2.bin \
+ $(1)/lib/firmware/mediatek/
+endef
+$(eval $(call BuildPackage,mt7988-wo-firmware))
diff --git a/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_0.bin b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_0.bin
new file mode 100644
index 0000000..6e44614
--- /dev/null
+++ b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_0.bin
Binary files differ
diff --git a/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_1.bin b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_1.bin
new file mode 100644
index 0000000..3d5bd5c
--- /dev/null
+++ b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_1.bin
Binary files differ
diff --git a/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_2.bin b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_2.bin
new file mode 100644
index 0000000..c484d32
--- /dev/null
+++ b/autobuild/unified/filogic/mac80211/master/files/package/kernel/mt7988-wo-firmware/files/mt7988_wo_2.bin
Binary files differ
diff --git a/autobuild/unified/filogic/mac80211/master/files/target/linux/mediatek/patches-6.6/999-3000-dts-netsys3-wed-changes.patch b/autobuild/unified/filogic/mac80211/master/files/target/linux/mediatek/patches-6.6/999-3000-dts-netsys3-wed-changes.patch
new file mode 100644
index 0000000..db0768f
--- /dev/null
+++ b/autobuild/unified/filogic/mac80211/master/files/target/linux/mediatek/patches-6.6/999-3000-dts-netsys3-wed-changes.patch
@@ -0,0 +1,186 @@
+From f909811b45ad4522a0749901e664fbd3a8819955 Mon Sep 17 00:00:00 2001
+From: Rex Lu <rex.lu@mediatek.com>
+Date: Fri, 27 Sep 2024 13:31:50 +0800
+Subject: [PATCH] dts netsys3 wed changes
+
+---
+ arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 142 ++++++++++++++++++++++
+ 1 file changed, 142 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+index 82a0cad..3457137 100644
+--- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
+@@ -195,6 +195,31 @@ secmon_reserved: secmon@43000000 {
+ reg = <0 0x43000000 0 0x50000>;
+ no-map;
+ };
++
++ wmcpu_emi: wmcpu-reserved@47cc0000 {
++ no-map;
++ reg = <0 0x47cc0000 0 0x00100000>;
++ };
++
++ wo_emi0: wo-emi@4f600000 {
++ reg = <0 0x4f600000 0 0x40000>;
++ no-map;
++ };
++
++ wo_emi1: wo-emi@4f640000 {
++ reg = <0 0x4f640000 0 0x40000>;
++ no-map;
++ };
++
++ wo_emi2: wo-emi@4f680000 {
++ reg = <0 0x4f680000 0 0x40000>;
++ no-map;
++ };
++
++ wo_data: wo-data@4f700000 {
++ reg = <0 0x4f700000 0 0x800000>;
++ no-map;
++ };
+ };
+
+ soc {
+@@ -771,6 +796,11 @@ i2c2: i2c@11005000 {
+ status = "disabled";
+ };
+
++ wed_pcie: wed_pcie@10003000 {
++ compatible = "mediatek,wed_pcie";
++ reg = <0 0x10003000 0 0x10>;
++ };
++
+ spi0: spi@11007000 {
+ compatible = "mediatek,ipm-spi-quad", "mediatek,spi-ipm";
+ reg = <0 0x11007000 0 0x100>;
+@@ -932,6 +962,117 @@ mmc0: mmc@11230000 {
+ status = "disabled";
+ };
+
++ wed0: wed@15010000 {
++ compatible = "mediatek,mt7988-wed",
++ "syscon";
++ reg = <0 0x15010000 0 0x2000>;
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
++ mediatek,wed_pcie = <&wed_pcie>;
++ memory-region = <&wo_emi0>, <&wo_data>;
++ memory-region-names = "wo-emi", "wo-data";
++ mediatek,wo-ccif = <&wo_ccif0>;
++ mediatek,wo-ilm = <&wo_ilm0>;
++ mediatek,wo-dlm = <&wo_dlm0>;
++ mediatek,wo-cpuboot = <&wo_cpuboot>;
++ };
++
++ wed1: wed@15012000 {
++ compatible = "mediatek,mt7988-wed",
++ "syscon";
++ reg = <0 0x15012000 0 0x2000>;
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
++ mediatek,wed_pcie = <&wed_pcie>;
++ memory-region = <&wo_emi1>, <&wo_data>;
++ memory-region-names = "wo-emi", "wo-data";
++ mediatek,wo-ccif = <&wo_ccif1>;
++ mediatek,wo-ilm = <&wo_ilm1>;
++ mediatek,wo-dlm = <&wo_dlm1>;
++ mediatek,wo-cpuboot = <&wo_cpuboot1>;
++ };
++
++ wed2: wed@15014000 {
++ compatible = "mediatek,mt7988-wed",
++ "syscon";
++ reg = <0 0x15014000 0 0x2000>;
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
++ mediatek,wed_pcie = <&wed_pcie>;
++ memory-region = <&wo_emi2>, <&wo_data>;
++ memory-region-names = "wo-emi", "wo-data";
++ mediatek,wo-ccif = <&wo_ccif2>;
++ mediatek,wo-ilm = <&wo_ilm2>;
++ mediatek,wo-dlm = <&wo_dlm2>;
++ mediatek,wo-cpuboot = <&wo_cpuboot2>;
++ };
++
++ wo_ccif0: syscon@151a5000 {
++ compatible = "mediatek,mt7988-wo-ccif", "syscon";
++ reg = <0 0x151a5000 0 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ wo_ccif1: syscon@152a5000 {
++ compatible = "mediatek,mt7988-wo-ccif", "syscon";
++ reg = <0 0x152a5000 0 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ wo_ccif2: syscon@153a5000 {
++ compatible = "mediatek,mt7988-wo-ccif", "syscon";
++ reg = <0 0x153a5000 0 0x1000>;
++ interrupt-parent = <&gic>;
++ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
++ };
++
++ wo_ilm0: syscon@151e0000 {
++ compatible = "mediatek,mt7988-wo-ilm", "syscon";
++ reg = <0 0x151e0000 0 0x8000>;
++ };
++
++ wo_ilm1: syscon@152e0000 {
++ compatible = "mediatek,mt7988-wo-ilm", "syscon";
++ reg = <0 0x152e0000 0 0x8000>;
++ };
++
++ wo_ilm2: syscon@153e0000 {
++ compatible = "mediatek,mt7988-wo-ilm", "syscon";
++ reg = <0 0x153e0000 0 0x8000>;
++ };
++
++ wo_dlm0: syscon@151e8000 {
++ compatible = "mediatek,mt7988-wo-dlm", "syscon";
++ reg = <0 0x151e8000 0 0x2000>;
++ };
++
++ wo_dlm1: syscon@152e8000 {
++ compatible = "mediatek,mt7988-wo-dlm", "syscon";
++ reg = <0 0x152e8000 0 0x2000>;
++ };
++
++ wo_dlm2: syscon@153e8000 {
++ compatible = "mediatek,mt7988-wo-dlm", "syscon";
++ reg = <0 0x153e8000 0 0x2000>;
++ };
++
++ wo_cpuboot: syscon@15194000 {
++ compatible = "mediatek,mt7988-wo-cpuboot", "syscon";
++ reg = <0 0x15194000 0 0x1000>;
++ };
++
++ wo_cpuboot1: syscon@15294000 {
++ compatible = "mediatek,mt7988-wo-cpuboot", "syscon";
++ reg = <0 0x15294000 0 0x1000>;
++ };
++
++ wo_cpuboot2: syscon@15394000 {
++ compatible = "mediatek,mt7988-wo-cpuboot", "syscon";
++ reg = <0 0x15394000 0 0x1000>;
++ };
++
+ pcie2: pcie@11280000 {
+ compatible = "mediatek,mt7988-pcie",
+ "mediatek,mt7986-pcie",
+@@ -1450,6 +1591,7 @@ eth: ethernet@15100000 {
+ <&apmixedsys CLK_APMIXED_SGMPLL>;
+ mediatek,ethsys = <ðsys>;
+ mediatek,infracfg = <&topmisc>;
++ mediatek,wed = <&wed0>, <&wed1>, <&wed2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+--
+2.45.2
+