tree a8224b9db5c3a9da68854a6d4ea69f3d02506c6b
parent ef87e252042b95f06482b5e6ef54a301d6ae38cf
author developer <developer@mediatek.com> 1628149840 +0800
committer developer <developer@mediatek.com> 1628248682 +0800

[][dts: mt7986: Decrease SNFI's clk to 52MHz to meet 3.3V IO spec.]

[Description]
Change SNFI's clk to 52MHz to meet 3.3V IO spec.

NFI1x clk rate should be as close to SPINFI clk rate as possible.

[Release-log]
N/A

Change-Id: Ibfa126f36904fadccfdd56401197a37e849eb3b2
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4836486