[][dts: mt7986: Decrease SNFI's clk to 52MHz to meet 3.3V IO spec.]
[Description]
Change SNFI's clk to 52MHz to meet 3.3V IO spec.
NFI1x clk rate should be as close to SPINFI clk rate as possible.
[Release-log]
N/A
Change-Id: Ibfa126f36904fadccfdd56401197a37e849eb3b2
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4836486
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index 56c2a53..6699966 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -556,8 +556,8 @@
clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
assigned-clocks = <&topckgen CK_TOP_SPINFI_SEL>,
<&topckgen CK_TOP_NFI1X_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_MM_D8_D2>,
- <&topckgen CK_TOP_CB_MM_D8>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_M_D8>,
+ <&topckgen CK_TOP_CB_M_D8>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
index adc409e..1bfb9ee 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -525,8 +525,8 @@
clock-names = "pad_clk", "nfi_clk", "nfi_hclk";
assigned-clocks = <&topckgen CK_TOP_SPINFI_SEL>,
<&topckgen CK_TOP_NFI1X_SEL>;
- assigned-clock-parents = <&topckgen CK_TOP_MM_D8_D2>,
- <&topckgen CK_TOP_CB_MM_D8>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_M_D8>,
+ <&topckgen CK_TOP_CB_M_D8>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";