target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-spim-nand-rfb.dts

/dts-v1/;
#include "mt7981.dtsi"
/ {
	model = "MediaTek MT7981 RFB";
	compatible = "mediatek,mt7981-spim-snand-rfb";
	chosen {
		bootargs = "console=ttyS0,115200n1 loglevel=8  \
				earlycon=uart8250,mmio32,0x11002000";
	};

	memory {
		// fpga ddr2: 128MB*2
		reg = <0 0x40000000 0 0x10000000>;
	};

	nmbm_spim_nand {
		compatible = "generic,nmbm";

		#address-cells = <1>;
		#size-cells = <1>;

		lower-mtd-device = <&spi_nand>;
		forced-create;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "BL2";
				reg = <0x00000 0x0100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env";
				reg = <0x0100000 0x0080000>;
			};

			partition@180000 {
				label = "Factory";
				reg = <0x180000 0x0200000>;
			};

			partition@380000 {
				label = "FIP";
				reg = <0x380000 0x0200000>;
			};

			partition@580000 {
				label = "ubi";
				reg = <0x580000 0x4000000>;
			};
		};
	};

	sound {
		compatible = "mediatek,mt79xx-si3218x-machine";
		mediatek,platform = <&afe>;
		mediatek,ext-codec = <&proslic_spi>;
		status = "okay";
	};
};

&afe {
	pinctrl-names = "default";
	pinctrl-0 = <&pcm_pins>;
	status = "okay";
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c_pins>;
	status = "okay";

	wm8960: wm8960@1a {
		compatible = "wlf,wm8960";
		reg = <0x1a>;
	};
};

&uart0 {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&eth {
        status = "okay";

        gmac0: mac@0 {
                compatible = "mediatek,eth-mac";
                reg = <0>;
                phy-mode = "2500base-x";

                fixed-link {
                        speed = <2500>;
                        full-duplex;
                        pause;
                };
        };

	gmac1: mac@1 {
		compatible = "mediatek,eth-mac";
		reg = <1>;
		phy-mode = "gmii";
		phy-handle = <&phy0>;
	};

        mdio: mdio-bus {
                #address-cells = <1>;
                #size-cells = <0>;

		phy0: ethernet-phy@0 {
			compatible = "ethernet-phy-id03a2.9461";
			reg = <0>;
			phy-mode = "gmii";
			rext = "sw";
			tx_r50 = "sw";
			tx_vcm = "sw";
			nvmem-cells = <&phy_calibration>;
			nvmem-cell-names = "phy-cal-data";
		};

		switch@0 {
                        compatible = "mediatek,mt7531";
                        reg = <31>;
                        reset-gpios = <&pio 39 0>;

                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;

                                port@0 {
                                        reg = <0>;
                                        label = "lan1";
                                };

                                port@1 {
                                        reg = <1>;
                                        label = "lan2";
                                };

                                port@2 {
                                        reg = <2>;
                                        label = "lan3";
                                };

                                port@3 {
                                        reg = <3>;
                                        label = "lan4";
                                };

                                port@6 {
                                        reg = <6>;
                                        label = "cpu";
                                        ethernet = <&gmac0>;
                                        phy-mode = "2500base-x";

                                        fixed-link {
                                                speed = <2500>;
                                                full-duplex;
                                                pause;
                                        };
                                };
                        };
                };
        };
};

&hnat {
	mtketh-wan = "eth1";
	mtketh-lan = "lan";
	mtketh-max-gmac = <2>;
	status = "okay";
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";
	spi_nand: spi_nand@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		reg = <0>;
		spi-max-frequency = <52000000>;
		spi-tx-buswidth = <4>;
		spi-rx-buswidth = <4>;
	};
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic_pins>;
	status = "okay";

	proslic_spi: proslic_spi@0 {
		compatible = "silabs,proslic_spi";
		reg = <0>;
		spi-max-frequency = <10000000>;
		spi-cpha = <1>;
		spi-cpol = <1>;
		channel_count = <1>;
		debug_level = <4>;       /* 1 = TRC, 2 = DBG, 4 = ERR */
		reset_gpio = <&pio 15 0>;
		ig,enable-spi = <1>;     /* 1: Enable, 0: Disable */
	};
};

&pio {

	i2c_pins: i2c-pins-g0 {
                mux {
                        function = "i2c";
                        groups = "i2c0_0";
                };
        };

        pcm_pins: pcm-pins-g0 {
                mux {
                        function = "pcm";
                        groups = "pcm";
                };
        };

        pwm0_pin: pwm0-pin-g0 {
                mux {
                        function = "pwm";
                        groups = "pwm0_0";
                };
        };

        pwm1_pin: pwm1-pin-g0 {
                mux {
                        function = "pwm";
                        groups = "pwm1_0";
                };
        };

        pwm2_pin: pwm2-pin {
                mux {
                        function = "pwm";
                        groups = "pwm2";
                };
        };

	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};
	};

	spic_pins: spi1-pins {
		mux {
			function = "spi";
			groups = "spi1_1";
		};
	};

	uart1_pins: uart1-pins-g1 {
                mux {
                        function = "uart";
                        groups = "uart1_1";
                };
        };

	uart2_pins: uart2-pins-g1 {
		mux {
                        function = "uart";
                        groups = "uart2_1";
                };
        };
};

&xhci {
	mediatek,u3p-dis-msk = <0x0>;
	phys = <&u2port0 PHY_TYPE_USB2>,
	       <&u3port0 PHY_TYPE_USB3>;
	status = "okay";
};