| commit | e1993bde6e0c0c0f3bccd8f0f643da2d7b6094aa | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Tue Jul 06 13:48:40 2021 +0800 |
| committer | developer <developer@mediatek.com> | Tue Jul 06 14:29:19 2021 +0800 |
| tree | e267264f5fedd43f36567c0e89861db091867337 | |
| parent | 3e9ad9d258196592efd51078aba09600ad536999 [diff] [blame] |
[][Change eip97 and audio to enable clock by its own dts node] [Description] Change eip97 and audio to enable clock by its own dts node [Release-log] Pass aplay tests for I2S+WM8960 Change-Id: If695f026cdc678e1356a3ceee6c8beb928a6e271 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4718676
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi index 8deebd5..5dab0a7 100644 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi +++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -408,6 +408,10 @@ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ring0", "ring1", "ring2", "ring3"; + clocks = <&infracfg_ao CK_INFRA_EIP97_CK>; + clock-names = "infra_eip97_ck"; + assigned-clocks = <&topckgen CK_TOP_EIP_B_SEL>; + assigned-clock-parents = <&topckgen CK_TOP_CB_NET2_800M>; }; pio: pinctrl@1001f000 {