[][Change eip97 and audio to enable clock by its own dts node]
[Description]
Change eip97 and audio to enable clock by its own dts node
[Release-log]
Pass aplay tests for I2S+WM8960
Change-Id: If695f026cdc678e1356a3ceee6c8beb928a6e271
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4718676
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index f1ebb96..9450a89 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -440,6 +440,10 @@
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
+ clocks = <&infracfg_ao CK_INFRA_EIP97_CK>;
+ clock-names = "infra_eip97_ck";
+ assigned-clocks = <&topckgen CK_TOP_EIP_B_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_CB_NET2_800M>;
};
pio: pinctrl@1001f000 {
@@ -690,6 +694,28 @@
compatible = "simple-bus";
};
+ afe: audio-controller@11210000 {
+ compatible = "mediatek,mt7986-audio";
+ reg = <0 0x11210000 0 0x9000>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg_ao CK_INFRA_AUD_BUS_CK>,
+ <&infracfg_ao CK_INFRA_AUD_26M_CK>,
+ <&infracfg_ao CK_INFRA_AUD_L_CK>,
+ <&infracfg_ao CK_INFRA_AUD_AUD_CK>,
+ <&infracfg_ao CK_INFRA_AUD_EG2_CK>;
+ clock-names = "aud_bus_ck",
+ "aud_26m_ck",
+ "aud_l_ck",
+ "aud_aud_ck",
+ "aud_eg2_ck";
+ assigned-clocks = <&topckgen CK_TOP_A1SYS_SEL>,
+ <&topckgen CK_TOP_AUD_L_SEL>,
+ <&topckgen CK_TOP_A_TUNER_SEL>;
+ assigned-clock-parents = <&topckgen CK_TOP_APLL2_D4>,
+ <&topckgen CK_TOP_CB_APLL2_196M>,
+ <&topckgen CK_TOP_APLL2_D4>;
+ };
+
trng: trng@1020f000 {
compatible = "mediatek,mt7986-rng",
"mediatek,mt7623-rng";