blob: 1dc15519a4cf21f3c0452454457c06e0055a262e [file] [log] [blame]
/dts-v1/;
#include "mt7986b.dtsi"
#include "mt7986b-pinctrl.dtsi"
#include "mt7986-spim-nand-partition.dtsi"
/ {
model = "MediaTek MT7986b RFB";
compatible = "mediatek,mt7986b-2500wan-spim-snand-rfb";
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
};
&uart0 {
status = "okay";
};
/* Warning: pins shared with &snand */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "disabled";
};
/* Warning: pins shared with &spi1 */
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "disabled";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy6>;
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&pio 6 1>;
reset-delay-us = <600>;
phy5: phy@5 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <5>;
};
phy6: phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
};
switch@0 {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan0";
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@4 {
reg = <4>;
label = "lan4";
};
port@5 {
reg = <5>;
label = "lan5";
phy-mode = "2500base-x";
phy-handle = <&phy5>;
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&hnat {
mtketh-wan = "eth1";
mtketh-lan = "lan";
mtketh-max-gmac = <2>;
status = "okay";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
cs-gpios = <0>, <0>;
status = "okay";
spi_nor@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
};
spi_nand: spi_nand@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <20000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
};
};
/* Warning: pins shared with &uart2 */
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic_pins>;
status = "okay";
};
&wbsys {
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
};
&pio {
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "flash";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
wf_dbdc_pins: wf_dbdc-pins {
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <MTK_DRIVE_4mA>;
};
};
};