[][Add AUXADC 32k clock and disable cooling_device]
[Description]
Add AUXADC 32k clock and disable cooling_device mechanism.
[Release-log]
N/A
Change-Id: Iadd25e95638e30838e0d548175b679c72e204162
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4929908
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
index f2108fa..aec9c42 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
@@ -33,7 +33,6 @@
compatible = "arm,cortex-a53";
enable-method = "psci";
reg = <0x0>;
- #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -41,7 +40,6 @@
compatible = "arm,cortex-a53";
enable-method = "psci";
reg = <0x1>;
- #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -49,7 +47,6 @@
compatible = "arm,cortex-a53";
enable-method = "psci";
reg = <0x2>;
- #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -57,7 +54,6 @@
enable-method = "psci";
compatible = "arm,cortex-a53";
reg = <0x3>;
- #cooling-cells = <2>;
};
};
@@ -308,82 +304,6 @@
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&thermal 0>;
-
- trips {
- cpu_passive: cpu-passive {
- temperature = <47000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu_active: cpu-active {
- temperature = <67000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- cpu_hot: cpu-hot {
- temperature = <87000>;
- hysteresis = <2000>;
- type = "hot";
- };
-
- cpu-crit {
- temperature = <107000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu1
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu2
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu3
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_active>;
- cooling-device = <&cpu0
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu1
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu2
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu3
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
-
- map2 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu1
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu2
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu3
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
- };
};
};
@@ -393,8 +313,9 @@
reg = <0 0x1100c800 0 0x800>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg_ao CK_INFRA_THERM_CK>,
- <&infracfg_ao CK_INFRA_ADC_26M_CK>;
- clock-names = "therm", "auxadc";
+ <&infracfg_ao CK_INFRA_ADC_26M_CK>,
+ <&infracfg_ao CK_INFRA_ADC_FRC_CK>;
+ clock-names = "therm", "auxadc", "adc_32k";
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
nvmem-cells = <&thermal_calibration>;
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
index 8cb09d5..76701f6 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -33,7 +33,6 @@
compatible = "arm,cortex-a53";
enable-method = "psci";
reg = <0x0>;
- #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -41,7 +40,6 @@
compatible = "arm,cortex-a53";
enable-method = "psci";
reg = <0x1>;
- #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -49,7 +47,6 @@
compatible = "arm,cortex-a53";
enable-method = "psci";
reg = <0x2>;
- #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -57,7 +54,6 @@
enable-method = "psci";
compatible = "arm,cortex-a53";
reg = <0x3>;
- #cooling-cells = <2>;
};
};
@@ -308,82 +304,6 @@
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&thermal 0>;
-
- trips {
- cpu_passive: cpu-passive {
- temperature = <47000>;
- hysteresis = <2000>;
- type = "passive";
- };
-
- cpu_active: cpu-active {
- temperature = <67000>;
- hysteresis = <2000>;
- type = "active";
- };
-
- cpu_hot: cpu-hot {
- temperature = <87000>;
- hysteresis = <2000>;
- type = "hot";
- };
-
- cpu-crit {
- temperature = <107000>;
- hysteresis = <2000>;
- type = "critical";
- };
- };
-
- cooling-maps {
- map0 {
- trip = <&cpu_passive>;
- cooling-device = <&cpu0
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu1
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu2
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu3
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
-
- map1 {
- trip = <&cpu_active>;
- cooling-device = <&cpu0
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu1
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu2
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu3
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
-
- map2 {
- trip = <&cpu_hot>;
- cooling-device = <&cpu0
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu1
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu2
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>,
- <&cpu3
- THERMAL_NO_LIMIT
- THERMAL_NO_LIMIT>;
- };
- };
};
};
@@ -393,8 +313,9 @@
reg = <0 0x1100c800 0 0x800>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg_ao CK_INFRA_THERM_CK>,
- <&infracfg_ao CK_INFRA_ADC_26M_CK>;
- clock-names = "therm", "auxadc";
+ <&infracfg_ao CK_INFRA_ADC_26M_CK>,
+ <&infracfg_ao CK_INFRA_ADC_FRC_CK>;
+ clock-names = "therm", "auxadc", "adc_32k";
mediatek,auxadc = <&auxadc>;
mediatek,apmixedsys = <&apmixedsys>;
nvmem-cells = <&thermal_calibration>;
diff --git a/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c b/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c
index e1886bb..5c004a8 100644
--- a/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c
+++ b/target/linux/mediatek/files-5.4/drivers/thermal/mtk_thermal.c
@@ -314,6 +314,7 @@
struct clk *clk_peri_therm;
struct clk *clk_auxadc;
+ struct clk *clk_adc_32k;
/* lock: for getting and putting banks */
struct mutex lock;
@@ -1122,6 +1123,12 @@
if (IS_ERR(mt->clk_auxadc))
return PTR_ERR(mt->clk_auxadc);
+ if (mt->conf->version == MTK_THERMAL_V3) {
+ mt->clk_adc_32k = devm_clk_get(&pdev->dev, "adc_32k");
+ if (IS_ERR(mt->clk_adc_32k))
+ return PTR_ERR(mt->clk_adc_32k);
+ }
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
mt->thermal_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(mt->thermal_base))
@@ -1171,10 +1178,18 @@
if (ret)
return ret;
+ if (mt->conf->version == MTK_THERMAL_V3) {
+ ret = clk_prepare_enable(mt->clk_adc_32k);
+ if (ret) {
+ dev_err(&pdev->dev, "Can't enable auxadc 32k clk: %d\n", ret);
+ return ret;
+ }
+ }
+
ret = clk_prepare_enable(mt->clk_auxadc);
if (ret) {
dev_err(&pdev->dev, "Can't enable auxadc clk: %d\n", ret);
- return ret;
+ goto err_disable_clk_adc_32k;
}
ret = clk_prepare_enable(mt->clk_peri_therm);
@@ -1209,6 +1224,9 @@
clk_disable_unprepare(mt->clk_peri_therm);
err_disable_clk_auxadc:
clk_disable_unprepare(mt->clk_auxadc);
+err_disable_clk_adc_32k:
+ if (mt->conf->version == MTK_THERMAL_V3)
+ clk_disable_unprepare(mt->clk_adc_32k);
return ret;
}
@@ -1220,6 +1238,9 @@
clk_disable_unprepare(mt->clk_peri_therm);
clk_disable_unprepare(mt->clk_auxadc);
+ if (mt->conf->version == MTK_THERMAL_V3)
+ clk_disable_unprepare(mt->clk_adc_32k);
+
return 0;
}