/dts-v1/;
#include "mt7981.dtsi"
/ {
	model = "MediaTek MT7981 RFB";
	compatible = "mediatek,mt7981-spim-snand-2500wan-gmac2-rfb";
	chosen {
		bootargs = "console=ttyS0,115200n1 loglevel=8  \
				earlycon=uart8250,mmio32,0x11002000";
	};

	memory {
		// fpga ddr2: 128MB*2
		reg = <0 0x40000000 0 0x10000000>;
	};

	gpio-keys {
			compatible = "gpio-keys";
				reset {
					label = "reset";
					linux,code = <KEY_RESTART>;
					gpios = <&pio 1 GPIO_ACTIVE_LOW>;
				};

				wps {
					label = "wps";
					linux,code = <KEY_WPS_BUTTON>;
					gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
				};
	};

	nmbm_spim_nand {
		compatible = "generic,nmbm";

		#address-cells = <1>;
		#size-cells = <1>;

		lower-mtd-device = <&spi_nand>;
		forced-create;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "BL2";
				reg = <0x00000 0x0100000>;
				read-only;
			};

			partition@100000 {
				label = "u-boot-env";
				reg = <0x0100000 0x0080000>;
			};

			partition@180000 {
				label = "Factory";
				reg = <0x180000 0x0200000>;
			};

			partition@380000 {
				label = "FIP";
				reg = <0x380000 0x0200000>;
			};

			partition@580000 {
				label = "ubi";
				reg = <0x580000 0x4000000>;
			};
		};
	};
};

&uart0 {
	status = "okay";
};

&watchdog {
	status = "okay";
};

&eth {
        status = "okay";

        gmac0: mac@0 {
                compatible = "mediatek,eth-mac";
                reg = <0>;
                phy-mode = "2500base-x";

                fixed-link {
                        speed = <2500>;
                        full-duplex;
                        pause;
                };
        };

        gmac1: mac@1 {
                compatible = "mediatek,eth-mac";
                reg = <1>;
                phy-mode = "2500base-x";

                fixed-link {
                        speed = <2500>;
                        full-duplex;
                        pause;
                };
        };

        mdio: mdio-bus {
                #address-cells = <1>;
                #size-cells = <0>;

		phy5: phy@5 {
			compatible = "ethernet-phy-id67c9.de0a";
			reg = <5>;
			reset-gpios = <&pio 14 1>;
			reset-assert-us = <600>;
			reset-deassert-us = <20000>;
			phy-mode = "2500base-x";
		};

                switch@0 {
                        compatible = "mediatek,mt7531";
                        reg = <31>;
                        reset-gpios = <&pio 39 0>;
                        ports {
                                #address-cells = <1>;
                                #size-cells = <0>;

                                port@0 {
                                        reg = <0>;
                                        label = "lan1";
                                };

                                port@1 {
                                        reg = <1>;
                                        label = "lan2";
                                };

                                port@2 {
                                        reg = <2>;
                                        label = "lan3";
                                };

                                port@3 {
                                        reg = <3>;
                                        label = "lan4";
                                };

                                port@6 {
                                        reg = <6>;
                                        label = "cpu";
                                        ethernet = <&gmac0>;
                                        phy-mode = "2500base-x";

                                        fixed-link {
                                                speed = <2500>;
                                                full-duplex;
                                                pause;
                                        };
                                };
                        };
                };
        };
};

&hnat {
	mtketh-wan = "eth1";
	mtketh-lan = "lan";
	mtketh-max-gmac = <2>;
	status = "okay";
};

&spi0 {
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_flash_pins>;
	status = "okay";
	spi_nand: spi_nand@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "spi-nand";
		spi-cal-enable;
		spi-cal-mode = "read-data";
		spi-cal-datalen = <7>;
		spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
		spi-cal-addrlen = <5>;
		spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
		reg = <0>;
		spi-max-frequency = <52000000>;
		spi-tx-buswidth = <4>;
		spi-rx-buswidth = <4>;
	};
};

&spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&spic_pins>;
	status = "disabled";

	slb9670: slb9670@0 {
		compatible = "infineon,slb9670";
		reg = <0>; /* CE0 */
		#address-cells = <1>;
		#size-cells = <0>;
		spi-cal-enable;
		spi-cal-mode = "read-data";
		spi-cal-datalen = <2>;
		spi-cal-data = /bits/ 8 <0x00 0x1b>;
		spi-max-frequency = <20000000>;
	};
};

&pio {

	i2c_pins: i2c-pins-g0 {
                mux {
                        function = "i2c";
                        groups = "i2c0_0";
                };
        };

        pcm_pins: pcm-pins-g0 {
                mux {
                        function = "pcm";
                        groups = "pcm";
                };
        };

        pwm0_pin: pwm0-pin-g0 {
                mux {
                        function = "pwm";
                        groups = "pwm0_0";
                };
        };

        pwm1_pin: pwm1-pin-g0 {
                mux {
                        function = "pwm";
                        groups = "pwm1_0";
                };
        };

        pwm2_pin: pwm2-pin {
                mux {
                        function = "pwm";
                        groups = "pwm2";
                };
        };

	spi0_flash_pins: spi0-pins {
		mux {
			function = "spi";
			groups = "spi0", "spi0_wp_hold";
		};

		conf-pu {
			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
		};

		conf-pd {
			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
			drive-strength = <MTK_DRIVE_8mA>;
			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
		};
	};

	spic_pins: spi1-pins {
		mux {
			function = "spi";
			groups = "spi1_1";
		};
	};

	uart1_pins: uart1-pins-g1 {
                mux {
                        function = "uart";
                        groups = "uart1_1";
                };
        };

	uart2_pins: uart2-pins-g1 {
		mux {
                        function = "uart";
                        groups = "uart2_1";
                };
        };
};

&xhci {
	status = "okay";
};