[][[openwrt][mt7988][config][refine adma rx hang detect condition]]
[Description]
Change adma rx hang error detection condition
[Release-log]
-current condition may mistakenly trigger reset event
-add DRX don't move condition
-mtk gdm rx fc counter offset is 0x24
Change-Id: Ibc40362855f67a148153dba8b45d16d66e781c98
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7775415
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
index 1042685..1defeaf 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.c
@@ -314,7 +314,7 @@
u32 i = 0, mib_base = 0, gdm_fc = 0;
for (i = 0; i < MTK_MAC_COUNT; i++) {
- mib_base = MTK_GDM1_TX_GBCNT + MTK_STAT_OFFSET*i;
+ mib_base = MTK_GDM1_TX_GBCNT + MTK_STAT_OFFSET*i + MTK_GDM_RX_FC;
gdm_fc = mtk_r32(eth, mib_base);
if (gdm_fc < 1)
return 1;
@@ -396,14 +396,16 @@
u32 mtk_monitor_adma_rx(struct mtk_eth *eth)
{
- static u32 err_cnt_arx;
- u32 err_flag = 0;
+ static u32 err_cnt_arx, pre_drx;
+ u32 err_flag = 0, cur_drx = 0;
+
u32 opq0 = (mtk_r32(eth, MTK_PSE_OQ_STA(0)) & 0x1FF) != 0;
u32 cdm1_fsm = (mtk_r32(eth, MTK_FE_CDM1_FSM) & 0xFFFF0000) != 0;
u32 cur_stat = ((mtk_r32(eth, MTK_ADMA_RX_DBG0) & 0x1F) == 0);
u32 fifo_rdy = ((mtk_r32(eth, MTK_ADMA_RX_DBG0) & 0x40) == 0);
+ cur_drx = mtk_r32(eth, MTK_ADMA_DRX_PTR);
- if (opq0 && cdm1_fsm && cur_stat && fifo_rdy) {
+ if (opq0 && cdm1_fsm && cur_stat && fifo_rdy && (cur_drx == pre_drx)) {
err_cnt_arx++;
if (err_cnt_arx >= 3) {
pr_info("ADMA Rx Info\n");
@@ -416,12 +418,15 @@
mtk_r32(eth, MTK_ADMA_RX_DBG0));
pr_info("MTK_ADMA_RX_DBG1 = 0x%x\n",
mtk_r32(eth, MTK_ADMA_RX_DBG1));
+ pr_info("MTK_ADMA_DRX_PTR = 0x%x\n",
+ mtk_r32(eth, MTK_ADMA_DRX_PTR));
pr_info("==============================\n");
err_flag = 1;
}
} else
err_cnt_arx = 0;
+ pre_drx = cur_drx;
if (err_flag)
return MTK_FE_STOP_TRAFFIC;
else
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.h
index 4ac77c8..a4117f4 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_reset.h
@@ -20,6 +20,8 @@
#define MTK_FE_START_TRAFFIC (0x2007)
#define MTK_FE_STOP_TRAFFIC_DONE_FAIL (0x2008)
+/*FE GDM Counter */
+#define MTK_GDM_RX_FC (0x24)
/* ADMA Rx Debug Monitor */
#define MTK_ADMA_RX_DBG0 (PDMA_BASE + 0x238)
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 181c56a..fd328e5 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -291,6 +291,9 @@
#define MTK_PST_DRX_IDX0 BIT(16)
#define MTK_PST_DRX_IDX_CFG(x) (MTK_PST_DRX_IDX0 << (x))
+/*PDMA HW RX Index Register*/
+#define MTK_ADMA_DRX_PTR (PDMA_BASE + 0x10C)
+
/* PDMA Delay Interrupt Register */
#define MTK_PDMA_DELAY_INT (PDMA_BASE + 0x20c)
#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2) || defined(CONFIG_MEDIATEK_NETSYS_V3)