tree 2d4a1fa2de089070a61136c85153cf4f864f97c9
parent 8d613a6f30e203a9991080821b231c6f204d2bde
author developer <developer@mediatek.com> 1682509866 +0800
committer developer <developer@mediatek.com> 1683269619 +0800

[][Add PCIe max link width adjustment feature]

[Description]
Add PCIe max link width adjustment feature.

[Release-log]
N/A

Change-Id: If4a7f53c8be8c6cf18b8febffd9fbfe88c743ff9
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/7422117