tree 696aeaaaae5a767e41fa06d54a4c63a11ca84300
parent 24ba51c5be18613127b2d8407b0223174624b130
author developer <developer@mediatek.com> 1668042430 +0800
committer developer <developer@mediatek.com> 1668570326 +0800

[][kernel][common][eth][Add MDC divider support]

[Description]
Add MDC divider support.

User can specify MDC speed by adding mdc-max-frequency property
to the mdio nodes.

================================================================
mdio: mdio-bus {
	#address-cells = <1>;
	#size-cells = <0>;
	mdc-max-frequency = <10500000>;

	phy0: ethernet-phy@0 {
		reg = <0>;
		compatible = "ethernet-phy-ieee802.3-c45";
		...
	};
	...
};
================================================================

Example: PHY device support 10.5MHz Maximum MDC clock.
User just need to declare this information in the DTS, driver will
find out a proper MDC divider(25MHz/3=8.33MHz) and setup
controller automatically.

If without this patch, MDC always running on 2.5MHz.

[Release-log]
N/A


Change-Id: If9171730373692243f02ceb9077bb496a774c8d0
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6756759