[][MAC80211][WiFi6][mt76][Fix txpower bbp CR]
[Description]
Fix txpower bbp CR for the value that should consider path table.
[Release-log]
N/A
Change-Id: I394cbf6c36469eb4f610d93850ad2277fa3725e1
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/8011069
diff --git a/autobuild_mac80211_release/package/kernel/mt76/patches/1036-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch b/autobuild_mac80211_release/package/kernel/mt76/patches/1036-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch
index 2ce9ef0..d1f5dc6 100644
--- a/autobuild_mac80211_release/package/kernel/mt76/patches/1036-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch
+++ b/autobuild_mac80211_release/package/kernel/mt76/patches/1036-wifi-mt76-mt7915-Disable-RegDB-when-enable-single-sk.patch
@@ -1,15 +1,16 @@
-From 4cb59dc3fc13de7cfb32800927cb586036f9ec7b Mon Sep 17 00:00:00 2001
+From b91693facf969212a2dfe087f988f41a4a8fe774 Mon Sep 17 00:00:00 2001
From: "Allen.Ye" <allen.ye@mediatek.com>
Date: Fri, 11 Aug 2023 16:46:53 +0800
-Subject: [PATCH 1035/1035] wifi: mt76: mt7915: Disable RegDB when enable
+Subject: [PATCH 1036/1040] wifi: mt76: mt7915: Disable RegDB when enable
single sku
---
eeprom.c | 3 ++-
mt76.h | 3 +++
- mt7915/debugfs.c | 43 +++++++++++++++++++++++++++++++++++++++++--
+ mt7915/debugfs.c | 49 +++++++++++++++++++++++++++++++++++++++++++-----
mt7915/init.c | 9 ++++++++-
- 4 files changed, 54 insertions(+), 4 deletions(-)
+ mt7915/regs.h | 8 ++++----
+ 5 files changed, 61 insertions(+), 11 deletions(-)
diff --git a/eeprom.c b/eeprom.c
index 4189525..38b0a58 100644
@@ -47,7 +48,7 @@
struct ieee80211_channel *chan,
struct mt76_power_limits *dest,
diff --git a/mt7915/debugfs.c b/mt7915/debugfs.c
-index 2bf907c..bb312ee 100644
+index 2bf907c..6dcee10 100644
--- a/mt7915/debugfs.c
+++ b/mt7915/debugfs.c
@@ -1019,10 +1019,16 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf,
@@ -68,14 +69,20 @@
ssize_t ret;
char *buf;
u32 reg;
-@@ -1084,9 +1090,36 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf,
- reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_TPC_CTRL_STAT(band) :
- MT_WF_PHY_TPC_CTRL_STAT_MT7916(band);
+@@ -1081,11 +1087,38 @@ mt7915_rate_txpower_get(struct file *file, char __user *user_buf,
+ len += scnprintf(buf + len, sz - len, "BW160/");
+ mt7915_txpower_puts(HE_RU2x996, 17);
+
+- reg = is_mt7915(&dev->mt76) ? MT_WF_PHY_TPC_CTRL_STAT(band) :
+- MT_WF_PHY_TPC_CTRL_STAT_MT7916(band);
++ reg = is_mt7915(&dev->mt76) ? MT_WF_IRPI_TPC_CTRL_STAT(band) :
++ MT_WF_IRPI_TPC_CTRL_STAT_MT7916(band);
- len += scnprintf(buf + len, sz - len, "\nTx power (bbp) : %6ld\n",
+- mt76_get_field(dev, reg, MT_WF_PHY_TPC_POWER));
+ len += scnprintf(buf + len, sz - len, "\nTx power (bbp) : %6ld [0.5 dBm]\n",
- mt76_get_field(dev, reg, MT_WF_PHY_TPC_POWER));
-
++ mt76_get_field(dev, reg, MT_WF_IRPI_TPC_POWER));
++
+ len += scnprintf(buf + len, sz - len, "RegDB maximum power:\t%d [dBm]\n",
+ chan->max_reg_power);
+
@@ -102,10 +109,9 @@
+
+ len += scnprintf(buf + len, sz - len, "nss_delta:\t%d [0.5 dBm]\n",
+ nss_delta);
-+
+
ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
- out:
@@ -1262,6 +1295,8 @@ static int
mt7915_txpower_info_show(struct seq_file *file, void *data)
{
@@ -162,6 +168,32 @@
chan->orig_mpwr = target_power;
}
}
+diff --git a/mt7915/regs.h b/mt7915/regs.h
+index 44da7b8..b21a5fd 100644
+--- a/mt7915/regs.h
++++ b/mt7915/regs.h
+@@ -1212,6 +1212,10 @@ enum offs_rev {
+ #define MT_WF_IRPI_NSS(phy, nss) MT_WF_IRPI(0x6000 + ((phy) << 20) + ((nss) << 16))
+ #define MT_WF_IRPI_NSS_MT7916(phy, nss) MT_WF_IRPI(0x1000 + ((phy) << 20) + ((nss) << 16))
+
++#define MT_WF_IRPI_TPC_CTRL_STAT(_phy) MT_WF_IRPI(0xc794 + ((_phy) << 16))
++#define MT_WF_IRPI_TPC_CTRL_STAT_MT7916(_phy) MT_WF_IRPI(0xc794 + ((_phy) << 20))
++#define MT_WF_IRPI_TPC_POWER GENMASK(31, 24)
++
+ #define MT_WF_IPI_RESET 0x831a3008
+
+ /* PHY */
+@@ -1228,10 +1232,6 @@ enum offs_rev {
+ #define MT_WF_PHY_RXTD12_IRPI_SW_CLR_ONLY BIT(18)
+ #define MT_WF_PHY_RXTD12_IRPI_SW_CLR BIT(29)
+
+-#define MT_WF_PHY_TPC_CTRL_STAT(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 16))
+-#define MT_WF_PHY_TPC_CTRL_STAT_MT7916(_phy) MT_WF_PHY(0xe7a0 + ((_phy) << 20))
+-#define MT_WF_PHY_TPC_POWER GENMASK(15, 8)
+-
+ #define MT_MCU_WM_CIRQ_BASE 0x89010000
+ #define MT_MCU_WM_CIRQ(ofs) (MT_MCU_WM_CIRQ_BASE + (ofs))
+ #define MT_MCU_WM_CIRQ_IRQ_MASK_CLR_ADDR MT_MCU_WM_CIRQ(0x80)
--
2.18.0