[][Remove mt7981 PCIe clock default on]
[Description]
Remove mt7981 PCIe clock default on, and add clocks control in PCIe node.
[Release-log]
N/A
Change-Id: I0eda423fb0a1d8a2d24d108a49a987c7e0e710b7
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5368869
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
index 653c4b2..083a723 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981-clkitg.dtsi
@@ -32,7 +32,7 @@
<&infracfg CK_INFRA_PWM>,
<&infracfg CK_INFRA_66M_MCK>,
<&infracfg CK_INFRA_CK_F32K>,
- <&infracfg CK_INFRA_PCIE_CK>,
+ <&clk40m>,
<&infracfg CK_INFRA_PWM_BCK>,
<&infracfg CK_INFRA_PWM_CK1>,
<&infracfg CK_INFRA_PWM_CK2>,
@@ -57,7 +57,7 @@
<&infracfg CK_INFRA_USB_SYS_CK>,
<&infracfg CK_INFRA_USB_CK>,
<&infracfg CK_INFRA_USB_XHCI_CK>,
- <&infracfg CK_INFRA_PCIE_GFMUX_TL_O_PRE>,
+ <&clk40m>,
<&infracfg CK_INFRA_F26M_CK0>,
<&infracfg_ao CK_INFRA_UART0_SEL>,
<&infracfg_ao CK_INFRA_UART1_SEL>,
@@ -67,7 +67,7 @@
<&infracfg_ao CK_INFRA_PWM1_SEL>,
<&infracfg_ao CK_INFRA_PWM2_SEL>,
<&infracfg_ao CK_INFRA_PWM_BSEL>,
- <&infracfg_ao CK_INFRA_PCIE_SEL>,
+ <&clk40m>,
<&infracfg_ao CK_INFRA_GPT_STA>,
<&infracfg_ao CK_INFRA_PWM_HCK>,
<&infracfg_ao CK_INFRA_PWM_STA>,
@@ -112,9 +112,9 @@
<&infracfg_ao CK_INFRA_IUSB_66M_CK>,
<&infracfg_ao CK_INFRA_IUSB_SYS_CK>,
<&infracfg_ao CK_INFRA_IUSB_CK>,
- <&infracfg_ao CK_INFRA_IPCIE_CK>,
- <&infracfg_ao CK_INFRA_IPCIER_CK>,
- <&infracfg_ao CK_INFRA_IPCIEB_CK>,
+ <&clk40m>,
+ <&clk40m>,
+ <&clk40m>,
<&topckgen CK_TOP_CB_M_416M>,
<&topckgen CK_TOP_CB_M_D2>,
<&topckgen CK_TOP_CB_M_D4>,
@@ -146,7 +146,7 @@
<&topckgen CK_TOP_USB_CDR_CK>,
<&clk40m>,
<&topckgen CK_TOP_I2C_BCK>,
- <&topckgen CK_TOP_PEXTP_TL>,
+ <&clk40m>,
<&topckgen CK_TOP_EMMC_208M>,
<&topckgen CK_TOP_EMMC_400M>,
<&topckgen CK_TOP_F26M_SEL>,
@@ -167,7 +167,7 @@
<&topckgen CK_TOP_UART_SEL>,
<&topckgen CK_TOP_PWM_SEL>,
<&topckgen CK_TOP_I2C_SEL>,
- <&topckgen CK_TOP_PEXTP_TL_SEL>,
+ <&clk40m>,
<&topckgen CK_TOP_EMMC_208M_SEL >,
<&topckgen CK_TOP_EMMC_400M_SEL >,
<&topckgen CK_TOP_F26M_SEL>,
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
index a71af1c..1c1fccd 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7981.dtsi
@@ -267,6 +267,11 @@
0x0 0x20000000 0 0x10000000>;
status = "disabled";
+ clocks = <&infracfg_ao CK_INFRA_IPCIE_CK>,
+ <&infracfg_ao CK_INFRA_IPCIE_PIPE_CK>,
+ <&infracfg_ao CK_INFRA_IPCIER_CK>,
+ <&infracfg_ao CK_INFRA_IPCIEB_CK>;
+
phys = <&u3port0 PHY_TYPE_PCIE>;
phy-names = "pcie-phy";