tree 178a14910ebdc687e5397620bcf654a315027ca9
parent 93d81470747f50f03ff05bbe6fde676c0f313cd2
author developer <developer@mediatek.com> 1719820102 +0800
committer developer <developer@mediatek.com> 1719977228 +0800

[][openwrt][change msdc clock source to 208M]

[Description]
Change infra_fmsdc clock source to 208M.
MT7981's MSDC's spec only meets eMMC 4.5.
And its design only utilizes 208M src pll mux.
Users can switch to 208M/200M or other clock rate.

[Release-log]
test ok

Change-Id: Ibd564a4cdbb2fd8f58057f93a8018630ddc0b8ec
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/9298049