commit | a5ea3d22cbd71b9d6851d11b558e35d088bf195f | [log] [tgz] |
---|---|---|
author | developer <developer@mediatek.com> | Thu Feb 17 09:23:09 2022 +0800 |
committer | developer <developer@mediatek.com> | Thu Feb 17 18:20:31 2022 +0800 |
tree | 36f82e6395b4d7ca7057c26c63cc5f8c45cf10e7 | |
parent | 7a8201db5b10ea801c595242931804833aa94363 [diff] [blame] |
[][MAC80211][Infra][Fix reg address for MT76] [Description] Fix reg address for MT76 [Release-log] N/A Change-Id: I9a1395994c15206611fdce49067d35eb42a9c224 Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/5631037
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi index 4984de4..14e3640 100644 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi +++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7986b.dtsi
@@ -460,7 +460,7 @@ reset-names = "consys"; reg = <0 0x18000000 0 0x1000000>, <0 0x10003000 0 0x1000>, - <0 0x11d1000 0 0x1000>; + <0 0x11d10000 0 0x1000>; interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,