[][kernel][mt7988][eth][dts: add gphy nodes under slave mdio]

[Description]
Add gphy nodes under slave mdio

[Release-log]
N/A

Change-Id: I18de6eb4e0ffca7a8fac80ae88683394dddfe5e6
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/6660300
Build: srv_hbgsm110
diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
index 4edf1f0..8e832f3 100644
--- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
+++ b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7988a-dsa-10g-spim-nor.dts
@@ -226,21 +226,29 @@
 				port@0 {
 					reg = <0>;
 					label = "lan0";
+					phy-mode = "gmii";
+					phy-handle = <&sphy0>;
 				};
 
 				port@1 {
 					reg = <1>;
 					label = "lan1";
+					phy-mode = "gmii";
+					phy-handle = <&sphy1>;
 				};
 
 				port@2 {
 					reg = <2>;
 					label = "lan2";
+					phy-mode = "gmii";
+					phy-handle = <&sphy2>;
 				};
 
 				port@3 {
 					reg = <3>;
 					label = "lan3";
+					phy-mode = "gmii";
+					phy-handle = <&sphy3>;
 				};
 
 				port@6 {
@@ -256,6 +264,52 @@
 					};
 				};
 			};
+
+			mdio {
+				compatible = "mediatek,dsa-slave-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				sphy0: switch_phy0@0 {
+					compatible = "ethernet-phy-id03a2.9481";
+					reg = <0>;
+					phy-mode = "gmii";
+					rext = "efuse";
+					tx_r50 = "efuse";
+					nvmem-cells = <&phy_calibration_p0>;
+					nvmem-cell-names = "phy-cal-data";
+				};
+
+				sphy1: switch_phy1@1 {
+					compatible = "ethernet-phy-id03a2.9481";
+					reg = <1>;
+					phy-mode = "gmii";
+					rext = "efuse";
+					tx_r50 = "efuse";
+					nvmem-cells = <&phy_calibration_p1>;
+					nvmem-cell-names = "phy-cal-data";
+				};
+
+				sphy2: switch_phy2@2 {
+					compatible = "ethernet-phy-id03a2.9481";
+					reg = <2>;
+					phy-mode = "gmii";
+					rext = "efuse";
+					tx_r50 = "efuse";
+					nvmem-cells = <&phy_calibration_p2>;
+					nvmem-cell-names = "phy-cal-data";
+				};
+
+				sphy3: switch_phy3@3 {
+					compatible = "ethernet-phy-id03a2.9481";
+					reg = <3>;
+					phy-mode = "gmii";
+					rext = "efuse";
+					tx_r50 = "efuse";
+					nvmem-cells = <&phy_calibration_p3>;
+					nvmem-cell-names = "phy-cal-data";
+				};
+			};
 		};
 	};
 };