[][Remove legacy pdma v1 support in netsys2.0]

[Description]
Remove legacy pdma v1 support in netsys2.0
1. only left flag : CONFIG_MEDIATEK_NETSYS_V2
2. only left caps : MTK_NETSYS_V2

[Release-log]
N/A

Change-Id: I850ae3ff4b60cbda03c06387f23430b32604d5b8
Reviewed-on: https://gerrit.mediatek.inc/c/openwrt/feeds/mtk_openwrt_feeds/+/4596413
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c
index 59e48bb..7f4a7b5 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_dbg.c
@@ -688,7 +688,7 @@
 		seq_printf(seq, "%d: %08x %08x %08x %08x", i,
 			   *(int *)&rx_ring[i].rxd1, *(int *)&rx_ring[i].rxd2,
 			   *(int *)&rx_ring[i].rxd3, *(int *)&rx_ring[i].rxd4);
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 		seq_printf(seq, " %08x %08x %08x %08x",
 			   *(int *)&rx_ring[i].rxd5, *(int *)&rx_ring[i].rxd6,
 			   *(int *)&rx_ring[i].rxd7, *(int *)&rx_ring[i].rxd8);
@@ -725,7 +725,7 @@
 	seq_printf(seq, "| PSE_IQ_STA2	: %08x |\n",
 		   mtk_r32(eth, MTK_PSE_IQ_STA(1)));
 
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2)) {
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 		seq_printf(seq, "| PSE_IQ_STA3	: %08x |\n",
 			   mtk_r32(eth, MTK_PSE_IQ_STA(2)));
 		seq_printf(seq, "| PSE_IQ_STA4	: %08x |\n",
@@ -737,7 +737,7 @@
 	seq_printf(seq, "| PSE_OQ_STA2	: %08x |\n",
 		   mtk_r32(eth, MTK_PSE_OQ_STA(1)));
 
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2)) {
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 		seq_printf(seq, "| PSE_OQ_STA3	: %08x |\n",
 			   mtk_r32(eth, MTK_PSE_OQ_STA(2)));
 		seq_printf(seq, "| PSE_OQ_STA4	: %08x |\n",
@@ -763,7 +763,7 @@
 	seq_printf(seq, "| MAC_P2_MCR	: %08x |\n",
 		   mtk_r32(eth, MTK_MAC_MCR(1)));
 
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2)) {
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 		seq_printf(seq, "| FE_CDM1_FSM	: %08x |\n",
 			   mtk_r32(eth, MTK_FE_CDM1_FSM));
 		seq_printf(seq, "| FE_CDM2_FSM	: %08x |\n",
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index 99b24e9..236f18d 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -816,7 +816,7 @@
 	rxd->rxd1 = READ_ONCE(dma_rxd->rxd1);
 	rxd->rxd3 = READ_ONCE(dma_rxd->rxd3);
 	rxd->rxd4 = READ_ONCE(dma_rxd->rxd4);
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 	rxd->rxd5 = READ_ONCE(dma_rxd->rxd5);
 	rxd->rxd6 = READ_ONCE(dma_rxd->rxd6);
 #endif
@@ -1016,7 +1016,7 @@
         qid = skb->mark & (MTK_QDMA_TX_MASK);
 #endif
 
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2)) {
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 		u32 txd5 = 0, txd6 = 0;
 		/* set the forward port */
 		fport = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2;
@@ -1068,7 +1068,7 @@
 
 #if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE)
 	if (HNAT_SKB_CB2(skb)->magic == 0x78681415) {
-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2)) {
+		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 			txd4 &= ~(0xf << TX_DMA_FPORT_SHIFT_V2);
 			txd4 |= 0x4 << TX_DMA_FPORT_SHIFT_V2;
 		} else {
@@ -1117,7 +1117,7 @@
 
 			WRITE_ONCE(txd->txd1, mapped_addr);
 
-			if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2)) {
+			if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 				WRITE_ONCE(txd->txd3, (TX_DMA_PLEN0(frag_map_size) |
 					   last_frag * TX_DMA_LS0));
 				WRITE_ONCE(txd->txd4, fport | TX_DMA_SWC_V2 |
@@ -1150,7 +1150,7 @@
 	/* store skb to cleanup */
 	itx_buf->skb = skb;
 
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2))
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
 		WRITE_ONCE(itxd->txd4, txd4 | QID_BITS_V2(qid));
 	else
 		WRITE_ONCE(itxd->txd4, txd4 | QID_HIGH_BITS(qid));
@@ -1377,8 +1377,8 @@
 		if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
 			mac = 0;
 		} else {
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
-			if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2))
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
+			if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
 				mac = RX_DMA_GET_SPORT(trxd.rxd5) - 1;
 			else
 #endif
@@ -1428,9 +1428,9 @@
 		skb->dev = netdev;
 		skb_put(skb, pktlen);
 
-		if ((!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2) &&
+		if ((!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) &&
 				  (trxd.rxd4 & eth->rx_dma_l4_valid)) ||
-		    (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2) &&
+		    (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) &&
 				  (trxd.rxd3 & eth->rx_dma_l4_valid)))
 			skb->ip_summed = CHECKSUM_UNNECESSARY;
 		else
@@ -1438,7 +1438,7 @@
 		skb->protocol = eth_type_trans(skb, netdev);
 
 		if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX) {
-			if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2)) {
+			if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 				if (trxd.rxd4 & RX_DMA_VTAG_V2)
 					__vlan_hwaccel_put_tag(skb,
 					htons(RX_DMA_VPID_V2(trxd.rxd3,
@@ -1462,8 +1462,8 @@
 		}
 
 #if defined(CONFIG_NET_MEDIATEK_HNAT) || defined(CONFIG_NET_MEDIATEK_HNAT_MODULE)
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2))
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
+		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
 			*(u32 *)(skb->head) = trxd.rxd5;
 		else
 #endif
@@ -1891,7 +1891,7 @@
 
 		ring->dma[i].rxd3 = 0;
 		ring->dma[i].rxd4 = 0;
-#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 		if (eth->soc->has_sram && ((sizeof(struct mtk_rx_dma)) > 16)) {
 			ring->dma[i].rxd5 = 0;
 			ring->dma[i].rxd6 = 0;
@@ -2416,7 +2416,7 @@
 	}
 
 	if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) {
-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_TX_V2))
+		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
 			mtk_w32(eth,
 				MTK_TX_DMA_EN | MTK_RX_DMA_EN |
 				MTK_DMA_SIZE_32DWORDS | MTK_TX_WB_DDONE |
@@ -2648,7 +2648,7 @@
 	ethsys_reset(eth, RSTCTRL_PPE);
 
 	/* Set FE to PDMAv2 if necessary */
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2))
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
 		mtk_w32(eth, mtk_r32(eth, MTK_FE_GLO_MISC) | MTK_PDMA_V2, MTK_FE_GLO_MISC);
 
 	if (eth->pctl) {
@@ -2689,7 +2689,7 @@
 	mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
 	mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
 
-	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2)) {
+	if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) {
 		/* PSE config input/output queue threshold */
 		mtk_w32(eth, 0x001a000e, PSE_IQ_REV(1));
 		mtk_w32(eth, 0x01ff001a, PSE_IQ_REV(2));
@@ -3203,7 +3203,7 @@
 		eth->rx_dma_l4_valid = RX_DMA_L4_VALID_PDMA;
 		eth->ip_align = NET_IP_ALIGN;
 	} else {
-		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_RX_V2))
+		if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2))
 			eth->rx_dma_l4_valid = RX_DMA_L4_VALID_V2;
 		else
 			eth->rx_dma_l4_valid = RX_DMA_L4_VALID;
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 41b46c4..2bac3e6 100755
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -111,15 +111,9 @@
 #define PSE_OQ_TH(x)		(0x160 + ((x - 1) * 0x4))
 
 #define MTK_PDMA_V2		BIT(4)
-#if defined(CONFIG_MEDIATEK_NETSYS_V2)
-#define CONFIG_MEDIATEK_NETSYS_RX_V2 1
 
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 #define PDMA_BASE               0x6000
-#else
-#define PDMA_BASE		0x4000
-#endif
-
 #define QDMA_BASE               0x4400
 #else
 #define PDMA_BASE               0x0800
@@ -261,7 +255,7 @@
 
 /* QDMA Interrupt Status Register */
 #define MTK_QDMA_INT_STATUS	(QDMA_BASE + 0x218)
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 #define MTK_RX_DONE_DLY 	BIT(14)
 #else
 #define MTK_RX_DONE_DLY 	BIT(30)
@@ -348,7 +342,7 @@
 #define MTK_TX_DMA_BUF_SHIFT    16
 #endif
 
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 #define MTK_RX_DMA_BUF_LEN      0xffff
 #define MTK_RX_DMA_BUF_SHIFT    8
 #define RX_DMA_SPORT_SHIFT      26
@@ -590,7 +584,7 @@
 	unsigned int rxd2;
 	unsigned int rxd3;
 	unsigned int rxd4;
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 	unsigned int rxd5;
 	unsigned int rxd6;
 	unsigned int rxd7;
@@ -810,8 +804,7 @@
 	MTK_SHARED_INT_BIT,
 	MTK_TRGMII_MT7621_CLK_BIT,
 	MTK_QDMA_BIT,
-	MTK_NETSYS_TX_V2_BIT,
-	MTK_NETSYS_RX_V2_BIT,
+	MTK_NETSYS_V2_BIT,
 	MTK_SOC_MT7628_BIT,
 
 	/* MUX BITS*/
@@ -844,8 +837,7 @@
 #define MTK_SHARED_INT		BIT(MTK_SHARED_INT_BIT)
 #define MTK_TRGMII_MT7621_CLK	BIT(MTK_TRGMII_MT7621_CLK_BIT)
 #define MTK_QDMA		BIT(MTK_QDMA_BIT)
-#define MTK_NETSYS_TX_V2	BIT(MTK_NETSYS_TX_V2_BIT)
-#define MTK_NETSYS_RX_V2	BIT(MTK_NETSYS_RX_V2_BIT)
+#define MTK_NETSYS_V2		BIT(MTK_NETSYS_V2_BIT)
 #define MTK_SOC_MT7628		BIT(MTK_SOC_MT7628_BIT)
 
 #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW		\
@@ -919,15 +911,9 @@
 		      MTK_MUX_U3_GMAC2_TO_QPHY | \
 		      MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA)
 
-#ifdef CONFIG_MEDIATEK_NETSYS_RX_V2
-#define MT7986_CAPS   (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \
-                       MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \
-                       MTK_NETSYS_TX_V2 | MTK_NETSYS_RX_V2)
-#else
 #define MT7986_CAPS   (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \
                        MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \
-                       MTK_NETSYS_TX_V2)
-#endif
+                       MTK_NETSYS_V2)
 
 /* struct mtk_eth_data -	This is the structure holding all differences
  *				among various plaforms
diff --git a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h
index 571e402..a7ae954 100644
--- a/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h
+++ b/target/linux/mediatek/files-5.4/drivers/net/ethernet/mediatek/mtk_hnat/nf_hnat_mtk.h
@@ -23,7 +23,7 @@
 	__u32 magic;
 };
 
-#if defined(CONFIG_MEDIATEK_NETSYS_RX_V2)
+#if defined(CONFIG_MEDIATEK_NETSYS_V2)
 struct hnat_desc {
 	u32 entry : 15;
 	u32 resv0 : 3;